ADC12130CIWM National Semiconductor, ADC12130CIWM Datasheet - Page 33

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ADC12130CIWM

Manufacturer Part Number
ADC12130CIWM
Description
IC, ADC, 12BIT, 114KSPS, SOIC-16
Manufacturer
National Semiconductor
Datasheet

Specifications of ADC12130CIWM

Resolution (bits)
12bit
Sampling Rate
114kSPS
Input Channel Type
Differential, Single Ended
Data Interface
Serial, SPI
Supply Voltage Range - Analog
3V To 5.5V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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3.0 REFERENCE VOLTAGE
The difference in the voltages applied to the V
V
the voltage applied between two multiplexer inputs or the
voltage applied to one of the multiplexer inputs and analog
ground) over which 4095 positive and 4096 negative codes
exist. The voltage sources driving V
very low output impedance and noise. The circuit in
Figure 16 is an example of a very stable reference appropriate
for use with the device.
*Tantalum
The ADC12130/2/8 can be used in either ratiometric or ab-
solute reference applications. In ratiometric systems, the ana-
log input voltage is proportional to the voltage used for the
ADC's reference voltage. When this voltage is the system
power supply, the V
connected to ground. This technique relaxes the system ref-
erence stability requirements because the analog input volt-
age and the ADC reference voltage move together. This
maintains the same output code for given input conditions.
For absolute accuracy, where the analog input voltage varies
between very specific voltage limits, a time and temperature
stable voltage source can be connected to the reference in-
puts. Typically, the reference voltage magnitude will require
an initial adjustment to null reference voltage induced full-
scale errors.
Below are recommended references along with some key
specifications.
REF
defines the analog input span (the difference between
FIGURE 16. Low Drift Extremely
Stable Reference Circuit
REF
+
pin is connected to V
REF
+
and V
FIGURE 15. Fully Differential Biasing
REF
A
+
and V
must have
REF
REF
+
1207943
and
is
33
The reference voltage inputs are not fully differential. The
ADC12130/2/8 will not generate correct conversions or com-
parisons if V
result when V
at all times between ground and V
range, (V
V
ladder should not go below 0.5V or above 3.0V. Figure 17 is
a graphic representation of the voltage restrictions on V
and V
LM4041CI-Adj
LM4040AI-4.1
LM4120AI-4.1
LM4121AI-4.1
LM4050AI-4.1
LM4030AI-4.1
LM4040AI-4.1
Circuit of Figure 16
A
+
). Therefore, with V
REF
Part Number
REF
.
+
REF
REF
+ V
+
+
REF
is taken below V
and V
)/2, is restricted to (0.1 × V
A
REF
+
= 5V, the center of the reference
differ by 1V or more and remain
Tolerance
Adjustable
Voltage
±0.05%
Output
±0.5%
±0.1%
±0.2%
±0.2%
±0.1%
±0.1%
A
+
REF
. The V
. Correct conversions
REF
1207942
Temperature
±100ppm/°C
±100ppm/°C
±3.0ppm/°C
common mode
Coefficient
±50ppm/°C
±50ppm/°C
±50ppm/°C
±10ppm/°C
±2ppm/°C
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A
+
) to (0.6 ×
REF
+

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