5M240ZT100C5N Altera, 5M240ZT100C5N Datasheet - Page 27

• Manufacturer Part Number: 5M240ZT100C5N
• Description: IC CPLD FLASH, 192, 7.5NS, 118.3MHZ, TQFP-100
• Manufacturer: Altera
• Series: MAX Vr

Specifications of 5M240ZT100C5N

• Cpld Type: FLASH
• No. Of Macrocells: 192
• No. Of I/o's: 79
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 4.6ns
• Frequency: 118.3MHz
• Supply Voltage Range: 1.71V To 1.89V
• Rohs Compliant: Yes
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 240
• Number Of Macrocells: 192
• Number Of Gates: -
• Number Of I /o: 79
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2: MAX V Architecture
User Flash Memory Block
User Flash Memory Block
December 2010 Altera Corporation
MAX V devices feature a single UFM block, which can be used like a serial EEPROM
for storing non-volatile information up to 8,192 bits. The UFM block connects to the
logic array through the MultiTrack interconnect, allowing any LE to interface to the
UFM block.
used to create customer interface or protocol logic to interface the UFM block data
outside of the device. The UFM block offers the following features:
■
■
■
■
■
■
Figure 2–15. UFM Block and Interface Signals
Non-volatile storage up to 16-bit wide and 8,192 total bits
Two sectors for partitioned sector erase
Built-in internal oscillator that optionally drives logic array
Program, erase, and busy signals
Auto-increment addressing
Serial interface to logic array with programmable interface
Figure 2–15
PROGRAM
OSC_ENA
DRSHFT
ARSHFT
ERASE
DRCLK
ARCLK
DRDin
ARDin
shows the UFM block and interface signals. The logic array is
Address
Register
9
UFM Block
16
Data Register
OSC
UFM Sector 1
UFM Sector 0
Program
Control
Erase
16
: _
4
RTP_BUSY
BUSY
OSC
DRDout
MAX V Device Handbook
2–21