EPM7256AEQC208-7N Altera, EPM7256AEQC208-7N Datasheet - Page 21
![IC PLD EEPROM 256 MACROCELL 7.5NS QFP208](/photos/19/4/190423/4732026_sml.jpg)
EPM7256AEQC208-7N
Manufacturer Part Number
EPM7256AEQC208-7N
Description
IC PLD EEPROM 256 MACROCELL 7.5NS QFP208
Manufacturer
Altera
Series
MAX 7000AEr
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7256AEQC208-7N
Cpld Type
EEPROM
No. Of Macrocells
256
No. Of I/o's
164
Propagation Delay
7.5ns
Global Clock Setup Time
3.9ns
Frequency
172.4MHz
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM7256AEQC208-7N
Manufacturer:
ALTERA
Quantity:
25
Part Number:
EPM7256AEQC208-7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
SAMPLE/PRELOAD
EXTEST
BYPASS
IDCODE
USERCODE
UESCODE
ISP Instructions
Table 8. MAX 7000A JTAG Instructions
JTAG Instruction
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins
Places the 1-bit bypass register between the TDI and TDO pins, which allows the BST
data to pass synchronously through a selected device to adjacent devices during normal
device operation
Selects the IDCODE register and places it between the TDI and TDO pins, allowing the
IDCODE to be serially shifted out of TDO
Selects the 32-bit USERCODE register and places it between the TDI and TDO pins,
allowing the USERCODE value to be shifted out of TDO. The USERCODE instruction is
available for MAX 7000AE devices only
These instructions select the user electronic signature (UESCODE) and allow the
UESCODE to be shifted out of TDO. UESCODE instructions are available for EPM7128A
and EPM7256A devices only.
These instructions are used when programming MAX 7000A devices via the JTAG ports
with the MasterBlaster, ByteBlasterMV, or BitBlaster download cable, or using a Jam
STAPL File, JBC File, or SVF File via an embedded processor or test equipment.
MAX 7000A Programmable Logic Device Data Sheet
Description
21