EPM7256AEQC208-10N Altera, EPM7256AEQC208-10N Datasheet - Page 19

IC PLD EEPROM 256 MACROCELL 10NS QFP-208

EPM7256AEQC208-10N

Manufacturer Part Number
EPM7256AEQC208-10N
Description
IC PLD EEPROM 256 MACROCELL 10NS QFP-208
Manufacturer
Altera
Series
MAX 7000AEr
Datasheet

Specifications of EPM7256AEQC208-10N

Cpld Type
EEPROM
No. Of Macrocells
256
No. Of I/o's
164
Propagation Delay
10ns
Global Clock Setup Time
3.9ns
Frequency
90.9MHz
Supply Voltage Range
3V To 3.6V
Family Name
MAX 7000A
Memory Type
EEPROM
# Macrocells
256
Number Of Usable Gates
5000
Frequency (max)
125MHz
Propagation Delay Time
10ns
Number Of Logic Blocks/elements
16
# I/os (max)
164
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM7256AEQC208-10N
Manufacturer:
ALTERA
Quantity:
1 000
Part Number:
EPM7256AEQC208-10N
Manufacturer:
ALTERA
0
Part Number:
EPM7256AEQC208-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
EPM7128A
EPM7256A
Table 5. MAX 7000A t
Table 6. MAX 7000A In-System Programming Times for Different Test Clock Frequencies
EPM7032AE
EPM7064AE
EPM7128AE
EPM7256AE
EPM7512AE
EPM7128A
EPM7256A
Device
EPM7032AE
EPM7064AE
EPM7128AE
EPM7256AE
EPM7512AE
Device
(1)
(1)
(1)
(1)
10 MHz
2.01
2.01
2.02
2.05
2.09
5.19
6.59
PULSE
The programming times described in
with the worst-case method using the enhanced ISP algorithm.
Tables 6
verification times for several common test clock frequencies.
& Cycle
5 MHz
2.01
2.02
2.04
2.09
2.18
5.27
6.75
t
PPULSE
2.00
2.00
2.00
2.00
2.00
5.11
6.43
TCK
and
2 MHz
(s)
Values
Programming
2.03
2.05
2.10
2.23
2.45
5.52
7.23
7
show the in-system programming and stand alone
1 MHz
2.06
2.11
2.21
2.45
2.89
5.94
8.03
1,603,000
Cycle
105,000
205,000
447,000
890,000
832,000
MAX 7000A Programmable Logic Device Data Sheet
55,000
f
TCK
PTCK
500 kHz
2.11
2.21
2.41
2.90
3.78
6.77
9.64
Tables 5
200 kHz
14.45
2.28
2.53
3.03
4.24
6.45
9.27
t
VPULSE
0.002
0.002
0.002
0.002
0.002
Stand-Alone Verification
0.03
0.03
through
(s)
100 kHz
10.90
13.43
22.46
2.55
3.05
4.05
6.47
7
are associated
50 kHz
10.94
19.80
21.75
38.49
1,024,000
Cycle
3.10
4.10
6.10
149,000
297,000
528,000
18,000
35,000
68,000
VTCK
Units
s
s
s
s
s
s
s
19

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