AM29F040B-55EF Spansion Inc., AM29F040B-55EF Datasheet - Page 9

• Manufacturer Part Number: AM29F040B-55EF
• Description: IC, FLASH, 4MBIT, 55NS, TSOP-32
• Manufacturer: Spansion Inc.

Specifications of AM29F040B-55EF

• Memory Type: Flash
• Memory Size: 4Mbit
• Memory Configuration: 512K X 8
• Access Time: 55ns
• Supply Voltage Range: 4.75V To 5.25V
• Memory Case Style: TSOP
• No. Of Pins: 32
• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 55ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Word Size: 8b
• Number Of Words: 512K
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register it-
self does not occupy any addressable memor y
location. The register is composed of latches that store
the commands, along with the address and data infor-
Legend:
L = Logic Low = V
Note: See the “Sector Protection/Unprotection” section. for more information.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE# should
remain at V
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory con-
tent occurs during the power transition. No command is
necessary in this mode to obtain array data. Standard
microprocessor read cycles that assert valid addresses
on the device address inputs produce valid data on the
device data outputs. The device remains enabled for
read access until the command register contents are
altered.
See
to the AC Read Operations table for timing specifica-
tions and to the Read Operations Timings diagram for
the timing waveforms. I
table represents the active current specification for
reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
An erase operation can erase one sector, multiple sec-
tors, or the entire device. The Sector Address Tables
November 11, 2009 21445E8
Read
Write
CMOS Standby
TTL Standby
Output Disable
“Reading Array Data”
IL
, and OE# to V
IH
.
IL
Operation
, H = Logic High = V
CC1
IH
for more information. Refer
.
in the DC Characteristics
Table 1. Am29F040B Device Bus Operations
IL
. CE# is the power
IH
, V
ID
= 12.0 ± 0.5 V, X = Don’t Care, D
D A T A
V
CC
CE#
Am29F040B
± 0.5 V
H
L
L
L
S H E E T
mation needed to execute the command. The contents
of the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function of
the device. The appropriate device bus operations
table lists the inputs and control levels required, and the
resulting output. The following subsections describe
each of these operations in further detail.
indicate the address space that each sector occupies.
A “sector address” consists of the address bits required
to uniquely select a sector. See the
tions”
entire chip, or suspending/resuming the erase
operation.
After the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in this
mode. Refer to the
Command Sequence”
I
tive current specification for the write mode. The “AC
Characteristics” section contains timing specification
tables and timing diagrams for write operations.
Program and Erase Operation Status
During an erase or program operation, the system may
check the status of the operation by reading the status
bits on DQ7–DQ0. Standard read cycle timings and I
read specifications apply. Refer to
Status”
teristics section for timing diagrams.
Standby Mode
When the system is not reading or writing to the device,
it can place the device in the standby mode. In this
mode, current consumption is greatly reduced, and the
CC2
OE#
in the DC Characteristics table represents the ac-
H
H
X
X
L
section for details on erasing a sector or the
for more information, and to each AC Charac-
IN
WE#
= Data In, D
H
X
X
H
L
“Autoselect Mode”
sections for more information.
A0–A20
OUT
A
A
X
X
X
IN
IN
= Data Out, A
“Command Defini-
“Write Operation
and
DQ0–DQ7
IN
High-Z
High-Z
High-Z
D
= Address In
“Autoselect
D
OUT
IN
CC
7