M25P16-VMF6P FARNELL, M25P16-VMF6P Datasheet
M25P16-VMF6P
Specifications of M25P16-VMF6P
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M25P16-VMF6P Summary of contents
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... Automotive Certified Parts Available April 2010 ® Forté™ Serial Flash Memory VFDFPN8 (MP) 6 × (MLP8) SO8N (MN) 150 mils width PDIP8 (BA) 300 mils width (MLP8 mm) Rev 20 M25P16 VDFPN8 (ME (MLP8) SO8W (MW) 208 mils width SO16 (MF) 300 mils width UFDFPN8 (MC) 1/59 www.numonyx.com 1 ...
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Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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SRWD bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Description The M25P16 Mbit (2 Mbit × 8) serial Flash memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction. The memory is organized as 32 sectors, each containing 256 pages. Each page is 256 bytes wide ...
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... PCB See Package mechanical section for package dimensions, and how to identify pin-1. Figure 3. SO16 connections Don’t use 2. See Package mechanical section for package dimensions, and how to identify pin-1. M25P16 HOLD AI08517 M25P16 HOLD ...
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Signal description 2.1 Serial Data output (Q) This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C). 2.2 Serial Data input (D) This input ...
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V supply voltage the supply voltage. CC 2.8 V ground the reference for the V SS supply voltage. CC 9/59 ...
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... Serial Data output (Q) line at a time, the other devices are high impedance. Resistors R (represented in that the M25P16 is not selected if the Bus Master leaves the S line in the high impedance state. As the Bus Master may enter a state where all inputs/outputs are in high impedance at ...
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Example pF, that is R*C p never leaves the SPI bus in the high impedance state for a time period shorter than 5 µs. Figure 5. SPI modes supported CPOL CPHA ...
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Operating features 4.1 Page programming To program one data byte, two instructions are required: Write Enable (WREN), which is one byte, and a Page Program (PP) sequence, which consists of four bytes plus data. This is followed by the ...
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... The environments where non-volatile memory devices are used can be very noisy. No SPI device can operate correctly in the presence of excessive noise. To help combat this, the M25P16 features the following data protection mechanisms: Power on reset and an internal timer (t changes while the power supply is outside the operating specification ...
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Table 2. Protected area sizes Status Register content BP2 BP1 BP0 bit bit bit none Upper 32nd (Sector 31 Upper sixteenth (2 sectors: 30 and 31) Lower 15/16ths (30 sectors: 0 ...
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Figure 6. Hold condition activation C HOLD (standard use) Hold condition (non-standard use) Hold condition AI02029D 15/59 ...
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Memory organization The memory is organized as: 2 097 152 bytes (8 bits each) 32 sectors (512 Kbits, 65536 bytes each) 8192 pages (256 bytes each). Each page can be individually programmed (bits are programmed from 1 to 0). ...
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Table 3. Memory organization Sector Address range 1F0000h ...
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Instructions All instructions, addresses and data are shifted in and out of the device, most significant bit first. Serial Data input (D) is sampled on the first rising edge of Serial Clock (C) after Chip Select (S) is driven ...
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Write Enable (WREN) The Write Enable (WREN) instruction The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction. The Write Enable (WREN) ...
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Read Identification (RDID) The Read Identification (RDID) instruction allows to read the device identification data: Manufacturer identification (1 byte) Device identification (2 bytes) A Unique ID code (UID) (17 bytes, of which 16 available upon customer request). The manufacturer ...
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Read Status Register (RDSR) The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status Register may be read at any time, even while a Program, Erase or Write Status Register cycle is in progress. ...
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SRWD bit The Status Register Write Disable (SRWD) bit is operated in conjunction with the Write Protect (W) signal. The Status Register Write Disable (SRWD) bit and Write Protect (W) signal allow the device to be put in the ...
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Write Status Register (WRSR) The Write Status Register (WRSR) instruction allows new values to be written to the Status Register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable ...
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Table 7. Protection modes W SRWD Mode signal bit 1 0 Software 0 0 Protected mode (SPM Hardwar 0 1 Protected mode (HPM defined by the values in the Block Protect (BP2, BP1, BP0) bits of ...
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Read Data Bytes (READ) The device is first selected by driving Chip Select (S) Low. The instruction code for the Read Data Bytes (READ) instruction is followed by a 3-byte address (A23-A0), each bit being latched-in during the rising ...
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Read Data Bytes at Higher Speed (FAST_READ) The device is first selected by driving Chip Select (S) Low. The instruction code for the Read Data Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23- A0) ...
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Page Program (PP) The Page Program (PP) instruction allows bytes to be programmed in the memory (changing bits from 1 to 0). Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the ...
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Figure 15. Page Program (PP) instruction sequence Data byte MSB 1. Address bits A23 to A21 are Don’t care. 28/ ...
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Sector Erase (SE) The Sector Erase (SE) instruction sets to ‘1’ (FFh) all bits inside the chosen sector. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction ...
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Bulk Erase (BE) The Bulk Erase (BE) instruction sets all bits to ‘1’ (FFh). Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable (WREN) instruction has been decoded, the ...
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Deep Power-down (DP) Executing the Deep Power-down (DP) instruction is the only way to put the device in the lowest consumption mode (the Deep Power-down mode). It can also be used as a software protection mechanism, while the device ...
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... Deep Power-down mode. The instruction can also be used to read, on Serial Data output (Q), the old-style 8-bit electronic signature, whose value for the M25P16 is 14h. Please note that this is not the same as, or even a subset of, the JEDEC 16-bit electronic signature that is read by the Read Identifier (RDID) instruction ...
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... C Instruction D High Impedance Q 1. The value of the 8-bit electronic signature, for the M25P16, is 14h. Figure 20. Release from Deep Power-down (RES) instruction sequence Instruction D High Impedance Q Driving Chip Select (S) High after the 8-bit instruction byte has been received by the device, but before the whole of the 8-bit electronic signature has been transmitted for the first time (as shown in still ensures that the device is put into Standby Power mode ...
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Power-up and power-down At power-up and power-down, the device must not be selected (that is Chip Select (S) must follow the voltage applied (min) at power-up, and then for a further delay ...
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Figure 21. Power-up timing (max (min) Reset state of the device V WI Table 8. Power-up timing and V Symbol ( (min Low VSL CC (1) t Time delay to ...
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Maximum rating Stressing the device above the rating listed in cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections ...
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DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristic tables that follow are derived from tests performed under the ...
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Table 14. DC characteristics Symbol I Input leakage current LI I Output leakage current LO I Standby current CC1 Deep Power-down I CC2 current I Operating current (READ) CC3 I Operating current (PP) CC4 I Operating current (WRSR) CC5 I ...
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Table 15. AC characteristics ( Applies only to products made with 110 nm technology Test conditions specified in Symbol Alt. Parameter Clock frequency for the following instructions FAST_READ, PP, SE, BE, DP, RES, WREN WRDI, RDID, ...
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Table 15. AC characteristics ( Symbol Alt. Page Program cycle time (256 bytes) Page Program cycle time (n bytes, where ( Page Program cycle time (n bytes, where 256) ...
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Table 16. AC characteristics (25 MHz operation) Test conditions specified in Symbol Alt. Clock frequency for the following instructions FAST_READ, PP, SE, BE, DP, RES, WREN WRDI, RDSR, WRSR f Clock frequency for READ instructions R ...
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Typical values given for °C. A Figure 23. Serial input timing S tCHSL C tDVCH D Q Figure 24. Write Protect setup and hold timing during WRSR when SRWD = 1 W tWHSL ...
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Figure 25. Hold timing HOLD Figure 26. Output timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D tHLCH tCHHL tCHHH tHLQZ tHHQX tCH tCLQV tCL tQLQH tQHQL tHHCH AI02032 tSHQZ LSB OUT AI01449e 43/59 ...
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Package mechanical In order to meet environmental requirements, Numonyx offers these devices in RoHS compliant packages, which have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box ...
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Table 17. VFQFPN8 (MLP8) 8-lead very thin fine pitch quad flat package no lead, 6 × 5 mm, package mechanical data millimeters Symbol Typ Min A 0.85 0.80 A1 — 0.00 A2 0.65 — A3 0.20 — b 0.40 0.35 ...
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Figure 28. VDFPN8 (MLP8) 8-lead very thin dual flat package no lead, 8 × 6 mm, package outline Drawing is not to scale. 2. The circle in the top view of the package indicates the position ...
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Figure 29. SO8N – 8 lead plastic small outline, 150 mils body width, package outline Drawing is not to scale. Table 19. SO8N – 8 lead plastic small outline, 150 mils body ...
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Figure 30. SO8W – 8 lead plastic small outline, 208 mils body width, package outline 1. Drawing is not to scale. Table 20. SO8 wide – 8 lead plastic small outline, 208 mils body width, package mechanical data Symbol Typ ...
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Figure 31. SO16 wide – 16-lead plastic small outline, 300 mils body width, package outline SO-H 1. Drawing is not to scale. Table 21. SO16 wide – 16-lead plastic small outline, 300 mils body width, ...
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Figure 32. PDIP8 – 8 lead Plastic Small Outline, 300 mils body width, package outline 1. Package is not to scale. Table 22. PDIP8 – 8 lead Plastic Small Outline, 300 mils body width, package mechanical data Symbol Typ A ...
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Figure 33. UFDFPN (MLP8) 8-lead ultra thin fine pitch dual flat package no lead, 4X3 mm package mechanical data 1. Drawing is not to scale. 51/59 ...
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Table 23. UFDFPN (MLP8) 8-lead ultra thin fine pitch dual flat package no lead, 4X3 mm package mechanical data Symbol Typ A 0.55 A1 0.02 A3 θ D2 0.80 E2 0.20 e 0.80 (2) N (3) ND (4) b 0.30 ...
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... Automotive –40 °C to 125 °C Part Device tested with high reliability certified flow blank = standard – °C device 1. Secure options are available upon customer request. 2. Not for new design, please use MP package version of the device. 3. Device grade 3 available in an SO8 RoHS compliant package. Example: M25P16 – (4) ( ...
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Numonyx strongly recommends the use of the Automotive Grade devices (AutoGrade 6 and Grade 3) for use in an automotive environment. The High Reliability Certified Flow (HRCF) is described in the quality note QNEE9801. Note: For a list of ...
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... Tested Parts from the non Auto Tested parts). Note: Numonyx strongly recommends the use of the Automotive Grade devices (Auto Grade 6 and automotive envirnoment. The high reliability certified flow (HRCF) is described in the quality note QNEE9801. Please ask your Numonyx sales office for a copy. M25P16 – ...
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Revision history Table 26. Document revision history Date Revision 16-Jan-2002 0.1 23-Apr-2002 0.4 13-Dec-2002 0.5 0.6 15-May- 2003 0.7 20-Jun-2003 0.8 24-Sep-2003 1.0 24-Nov-2003 2.0 17-May- 3.0 2004 01-Apr-2005 4.0 01-Aug-2005 5.0 20-Oct-2005 6.0 27-Feb-2006 7 04-Jul-2006 8 56/59 ...
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Table 26. Document revision history (continued) Date Revision Page Program, Sector Erase and Bulk Erase updated in Features. V max modified in IO 10-Oct-2006 9 Table 15: AC characteristics (110 nm technology) VFQFPN8 package specifications updated (see to Table Small ...
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Table 26. Document revision history (continued) Date Revision 6-March 16 2008 3-August- 17 2009 14-Oct-2009 18 23-Feb-2010 19 14-April- 20 2010 58/59 Changes Added “Automotive Certified Parts” information to cover page, data retention table, AC Characteristics table, and ordering information. ...
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INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE ...