PIC16F1826-I/SS Microchip Technology, PIC16F1826-I/SS Datasheet - Page 53
![IC, 8BIT MCU, PIC16F, 32MHZ, SSOP-20](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F1826-I/SS
Manufacturer Part Number
PIC16F1826-I/SS
Description
IC, 8BIT MCU, PIC16F, 32MHZ, SSOP-20
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16F1826-IP.pdf
(406 pages)
3.PIC16F1826-IP.pdf
(12 pages)
4.PIC16F1826-IP.pdf
(8 pages)
5.PIC16F1826-IP.pdf
(40 pages)
6.PIC16LF1827-ISS.pdf
(400 pages)
Specifications of PIC16F1826-I/SS
Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
2kWords
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
15
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1826-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F722-ISS PDF datasheet
- PIC16F1826-IP PDF datasheet #2
- PIC16F1826-IP PDF datasheet #3
- PIC16F1826-IP PDF datasheet #4
- PIC16F1826-IP PDF datasheet #5
- PIC16LF1827-ISS PDF datasheet #6
- Current page: 53 of 406
- Download datasheet (4Mb)
4.2
Code protection allows the device to be protected from
unauthorized access. Program memory protection and
data EEPROM protection are controlled independently.
Internal access to the program memory and data
EEPROM are unaffected by any code protection
setting.
4.2.1
The entire program memory space is protected from
external reads and writes by the CP bit in Configuration
Word 1. When CP = 0, external reads and writes of
program memory are inhibited and a read will return all
‘0’s. The CPU can continue to read program memory,
regardless of the protection bit settings. Writing the
program memory is dependent upon the write
protection
Protection” for more information.
4.2.2
The entire data EEPROM is protected from external
reads and writes by the CPD bit. When CPD = 0, exter-
nal reads and writes of data EEPROM are inhibited.
The CPU can continue to read and write data EEPROM
regardless of the protection bit settings.
4.3
Write protection allows the device to be protected from
unintended self-writes. Applications, such as boot-
loader software, can be protected while allowing other
regions of the program memory to be modified.
The WRT<1:0> bits in Configuration Word 2 define the
size of the program memory block that is protected.
4.4
Four memory locations (8000h-8003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
readable and writable during normal execution. See
Section 11.5 “User ID, Device ID and Configuration
Word Access” for more information on accessing
these memory locations. For more information on
checksum calculation, see the “PIC16F/LF1826/27
Memory Programming Specification” (DS41390).
2010 Microchip Technology Inc.
Code Protection
Write Protection
User ID
PROGRAM MEMORY PROTECTION
DATA EEPROM PROTECTION
setting.
See
Section 4.3
“Write
Preliminary
PIC16F/LF1826/27
DS41391C-page 53
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