PIC16LF874A-I/PT Microchip Technology, PIC16LF874A-I/PT Datasheet - Page 99

• Manufacturer Part Number: PIC16LF874A-I/PT
• Description: IC, 8BIT MCU, PIC16LF, 20MHZ, TQFP-44
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16LF874A-I/PT

• Controller Family/series: PIC16LF
• No. Of I/o's: 33
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Core Size: 8 Bit
• Program Memory Size: 4 Kwords
• Core Processor: PIC
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.4.7
In I
reload value is placed in the lower 7 bits of the
SSPADD register (Figure 9-17). When a write occurs to
SSPBUF, the Baud Rate Generator will automatically
begin counting. The BRG counts down to 0 and stops
until another reload has taken place. The BRG count is
decremented twice per instruction cycle (T
Q2 and Q4 clocks. In I
reloaded automatically.
FIGURE 9-17:
TABLE 9-3:
 2003 Microchip Technology Inc.
Note 1:
2
C Master mode, the Baud Rate Generator (BRG)
10 MHz
10 MHz
10 MHz
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
BAUD RATE GENERATOR
F
CY
2
C interface does not conform to the 400 kHz I
I
2
C CLOCK RATE W/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM3:SSPM0
2
C Master mode, the BRG is
SCL
SSPM3:SSPM0
20 MHz
20 MHz
20 MHz
8 MHz
8 MHz
8 MHz
2 MHz
2 MHz
2 MHz
F
CY
CY
*2
) on the
Control
Reload
CLKO
Reload
Once the given operation is complete (i.e., transmis-
sion of the last data bit is followed by ACK), the internal
clock will automatically stop counting and the SCL pin
will remain in its last state.
Table 9-3
instruction cycles and the BRG value loaded into
SSPADD.
2
BRG Down Counter
C specification (which applies to rates greater than
SSPADD<6:0>
BRG Value
0Dh
3Fh
0Ah
0Ah
19h
20h
28h
03h
00h
demonstrates
PIC16F87XA
F
OSC
clock
(2 Rollovers of BRG)
/4
400 kHz
400 kHz
333 kHz
312.5 kHz
1 MHz
rates
100 kHz
308 kHz
100 kHz
100 kHz
DS39582B-page 97
F
SCL
(1)
(1)
(1)
(1)
based
on