PIC24FJ256GB210-I/BG Microchip Technology, PIC24FJ256GB210-I/BG Datasheet - Page 185
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PIC24FJ256GB210-I/BG
Manufacturer Part Number
PIC24FJ256GB210-I/BG
Description
IC, 16BIT MCU, PIC24F, 32MHZ, BGA-121
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ256GB210-I/BG
Controller Family/series
PIC24
No. Of I/o's
84
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
9
Core Size
16 Bit
Program Memory Size
256KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
44
Number Of Timers
5
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240021
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB210-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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12.0
The Timer2/3 and Timer4/5 modules are 32-bit timers,
which can also be configured as four independent, 16-bit
timers with selectable operating modes.
As 32-bit timers, Timer2/3 and Timer4/5 can each
operate in three modes:
• Two independent 16-bit timers with all 16-bit
• Single 32-bit timer
• Single 32-bit synchronous counter
They also support these features:
• Timer Gate Operation
• Selectable Prescaler Settings
• Timer Operation during Idle and Sleep modes
• Interrupt on a 32-Bit Period Register Match
• ADC Event Trigger (only on Timer2/3 in 32-bit
Individually, all four of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above except for the ADC Event Trigger.
The trigger is implemented only on Timer2/3 in 32-bit
mode and Timer3 in 16-bit mode. The operating modes
and enabled features are determined by setting the
appropriate bit(s) in the T2CON, T3CON, T4CON and
T5CON registers. T2CON and T4CON are shown in
generic form in Register 12-1; T3CON and T5CON are
shown in generic form Register 12-2.
For 32-bit timer/counter operation, Timer2 and Timer4
are the least significant word; Timer3 and Timer4 are
the most significant word of the 32-bit timers.
2010 Microchip Technology Inc.
Note:
operating modes (except Asynchronous Counter
mode)
mode and Timer3 in 16-bit mode)
Note:
TIMER2/3 AND TIMER4/5
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section 14. “Timers” (DS39704). The
information in this data sheet supersedes
the information in the FRM.
For 32-bit operation, T3CON and T5CON
control bits are ignored. Only T2CON and
T4CON control bits are used for setup and
control. Timer2 and Timer4 clock and gate
inputs are utilized for the 32-bit timer
modules, but an interrupt is generated with
the Timer3 or Timer5 interrupt flags.
Family
Reference
Manual”,
PIC24FJ256GB210 FAMILY
To configure Timer2/3 or Timer4/5 for 32-bit operation:
1.
2.
3.
4.
5.
6.
The timer value, at any point, is stored in the register
pair, TMR<3:2> (or TMR<5:4>). TMR3 (TMR5) always
contains the most significant word of the count, while
TMR2 (TMR4) contains the least significant word.
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
Set the T32 bit (T2CON<3> or T4CON<3> = 1).
Select the prescaler ratio for Timer2 or Timer4
using the TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits. If TCS is set to an external
clock, RPINRx (TxCK) must be configured to
an available RPn/RPIn pin. For more informa-
tion, see Section 10.4 “Peripheral Pin Select
(PPS)”.
Load the timer period value. PR3 (or PR5) will
contain the most significant word (msw) of the
value while PR2 (or PR4) contains the least
significant word (lsw).
If interrupts are required, set the interrupt enable
bit, T3IE or T5IE; use the priority bits, T3IP<2:0>
or T5IP<2:0>, to set the interrupt priority. Note
that while Timer2 or Timer4 controls the timer,
the interrupt appears as a Timer3 or Timer5
interrupt.
Set the TON bit (= 1).
Clear the T32 bit corresponding to that timer
(T2CON<3>
T4CON<3> for Timer4 and Timer5).
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits. See Section 10.4 “Peripheral
Pin Select (PPS)” for more information.
Load the timer period value into the PRx register.
If interrupts are required, set the interrupt enable
bit, TxIE; use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON (TxCON<15> = 1) bit.
for
Timer2
and
DS39975A-page 185
Timer3
or
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