PIC24FJ256GB210-I/BG Microchip Technology, PIC24FJ256GB210-I/BG Datasheet - Page 200
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PIC24FJ256GB210-I/BG
Manufacturer Part Number
PIC24FJ256GB210-I/BG
Description
IC, 16BIT MCU, PIC24F, 32MHZ, BGA-121
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ256GB210-I/BG
Controller Family/series
PIC24
No. Of I/o's
84
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
9
Core Size
16 Bit
Program Memory Size
256KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
44
Number Of Timers
5
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240021
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB210-I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 200 of 386
- Download datasheet (4Mb)
PIC24FJ256GB210 FAMILY
REGISTER 14-1:
DS39975A-page 200
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12-10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
Note 1:
ENFLT0
R/W-0
U-0
—
2:
3:
4:
(2)
The OCx output must also be configured to an available RPn pin. For more information, see Section 10.4
“Peripheral Pin Select (PPS)”.
The Fault input enable and Fault status bits are valid when OCM<2:0> = 111 or 110.
The Comparator 1 output controls the OC1-OC3 channels; Comparator 2 output controls the OC4-OC6
channels. Comparator 3 output controls the OC7-OC9 channels.
The OCFA/OCFB Fault input must also be configured to an available RPn/RPIn pin. For more information,
see Section 10.4 “Peripheral Pin Select (PPS)”.
Unimplemented: Read as ‘0’
OCSIDL: Stop Output Compare x in Idle Mode Control bit
1 = Output Compare x halts in CPU Idle mode
0 = Output Compare x continues to operate in CPU Idle mode
OCTSEL<2:0>: Output Compare x Timer Select bits
111 = Peripheral clock (F
110 = Reserved
101 = Reserved
100 = Timer1 clock (only the synchronous clock is supported)
011 = Timer5 clock
010 = Timer4 clock
001 = Timer3 clock
000 = Timer2 clock
ENFLT2: Fault Input 2 Enable bit
1 = Fault 2 (Comparator 1/2/3 out) is enabled
0 = Fault 2 is disabled
ENFLT1: Fault Input 1 Enable bit
1 = Fault 1 (OCFB pin) is enabled
0 = Fault 1 is disabled
ENFLT0: Fault Input 0 Enable bit
1 = Fault 0 (OCFA pin) is enabled
0 = Fault 0 is disabled
OCFLT2: PWM Fault 2 (Comparator 1/2/3) Condition Status bit
1 = PWM Fault 2 has occurred
0 = No PWM Fault 2 has occurred
OCFLT1: PWM Fault 1 (OCFB pin) Condition Status bit
1 = PWM Fault 1 has occurred
0 = No PWM Fault 1 has occurred
OCFLT0: PWM Fault 0 (OCFA pin) Condition Status bit
1 = PWM Fault 0 has occurred
0 = No PWM Fault 0 has occurred
R/W-0, HSC R/W-0, HSC R/W-0, HSC
OCFLT2
U-0
—
OCxCON1: OUTPUT COMPARE x CONTROL REGISTER 1
(2)
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
OCFLT1
OCSIDL
R/W-0
(2)
CY
)
OCFLT0
OCTSEL2
R/W-0
(2)
(2)
(2)
(4)
(4)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRIGMODE
OCTSEL1
(3)
R/W-0
R/W-0
(2,4)
(2,4)
OCTSEL0
OCM2
R/W-0
R/W-0
(2,3)
(1)
2010 Microchip Technology Inc.
x = Bit is unknown
ENFLT2
OCM1
R/W-0
R/W-0
(1)
(2)
ENFLT1
OCM0
R/W-0
R/W-0
(1)
bit 8
bit 0
(2)
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