PIC32MX360F256L-80I/BG Microchip Technology, PIC32MX360F256L-80I/BG Datasheet - Page 41

IC, 32BIT MCU, PIC32, 80MHZ, BGA-100

PIC32MX360F256L-80I/BG

Manufacturer Part Number
PIC32MX360F256L-80I/BG
Description
IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX360F256L-80I/BG

Controller Family/series
PIC32
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
No. Of Pwm Channels
5
Core Size
32 Bit
Program Memory Size
256 KB
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
121-TFBGA
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EUART, I2C, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX360F256L-80I/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 4-7:
TABLE 4-8:
Legend:
Note
Legend:
Note
BF80_6210
BF80_6220 U2TXREG
BF80_6230 U2RXREG
BF80_6240 U2BRG
BF80_5800 SPI1CON
BF80_5810 SPI1STAT
BF80_5820
BF80_5830
BF80_5A00 SPI2CON
BF80_5A10 SPI2STAT
BF80_5A20
BF80_5A30 SPI2BRG
Virtual
Virtual
Addr
Addr
SFR
SFR
1:
1:
2:
U2STA
SPI1BUF
SPI1BRG
SPI2BUF
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
This register has corresponding CLR, SET, and INV Registers at its virtual address, plus an offset of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more information.
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table except SPIxBUF have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Regis-
ters” for more information.
SPI2 Module is not present on PIC32MX420FXXXX/440FXXXX devices.
Name
Name
SFR
SFR
(1)
(1)
UART1-2 REGISTERS MAP (CONTINUED)
SPI1-2 REGISTERS MAP
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
FRMEN
FRMEN
31/15
31/15
Bits
Bits
UTXISEL<1:0>
ON
ON
FRMSYNC FRMPOL
FRMSYNC FRMPOL
30/14
30/14
Bits
Bits
FRZ
FRZ
UTXINV
29/13
29/13
SIDL
SIDL
Bits
Bits
(1,2)
DISSDO
DISSDO
URXEN
28/12
28/12
Bits
Bits
SPIBUSY
SPIBUSY
UTXBRK
MODE32
MODE32
27/11
27/11
Bits
Bits
MODE16
MODE16
UTXEN
26/10
26/10
Bits
Bits
UTXBF
25/9
25/9
SMP
SMP
Bits
Bits
ADM_EN
TRMT
Bits
24/8
Bits
24/8
CKE
CKE
TX8
RX8
DATA<31:0>
DATA<31:0>
BRG<15:0>
SSEN
SSEN
Bits
23/7
Bits
23/7
URXISEL<1:0>
SPIROV
SPIROV
Bits
22/6
Bits
22/6
CKP
CKP
ADDEN
MSTEN
MSTEN
Bits
21/5
Bits
21/5
BRG<8:0>
BRG<8:0>
RIDLE
Transmit Register
20/4
Receive Register
20/4
Bits
Bits
ADDR<7:0>
SPITBE
SPITBE
PERR
19/3
19/3
Bits
Bits
FERR
18/2
18/2
Bits
Bits
OERR
SPIFE
SPIFE
Bits
17/1
Bits
17/1
URXDA
SPIRBF
SPIRBF
Bits
16/0
Bits
16/0

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