ATTINY261A-SU Atmel, ATTINY261A-SU Datasheet - Page 28
ATTINY261A-SU
Manufacturer Part Number
ATTINY261A-SU
Description
IC, MCU, 8BIT, 2K FLASH, 20SOIC
Manufacturer
Atmel
Datasheet
1.ATTINY461A-MU.pdf
(292 pages)
Specifications of ATTINY261A-SU
Controller Family/series
ATtiny
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
128Byte
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
2KB
Oscillator Type
External, Internal
Rohs Compliant
Yes
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6.2.3
28
ATtiny261A/461A/861A
Calibrated Internal 8 MHz Oscillator
When the PLL output is selected as clock source, the start-up times are determined by SUT fuse
bits as shown in
Table 6-5.
By default, the Internal Oscillator provides an approximately 8 MHz clock signal. Though voltage
and temperature dependent, this clock can be very accurately calibrated by the user. See
19-2 on page 186
with the CKDIV8 Fuse programmed. See
This clock may be selected as the system clock by programming the CKSEL Fuses as shown in
Table
the pre-programmed calibration value into the OSCCAL Register and thereby automatically cal-
ibrates the internal oscillator. The accuracy of this calibration is shown as Factory calibration in
Table 19-2 on page
Table 6-6.
Notes:
When this oscillator is selected, start-up times are determined by SUT fuses as shown in
6-7.
Table 6-7.
Note:
SUT1:0
SUT1:0
10
00
01
10
11
00
01
11
(2)
6-6. If selected, it will operate with no external components. During reset, hardware loads
1. The device is shipped with this option selected.
2. If the oscillator frequency exceeds the specification of the device (depends on V
1. If the RSTDISBL fuse is programmed, this start-up time will be increased to 14CK + 4 ms to
2. The device is shipped with this option selected.
CKDIV8 Fuse can be programmed to divide the internal frequency by 8.
ensure programming mode can be entered.
14CK + 16K (16384) + 64 ms
14CK + 16K (16384) + 4 ms
CKSEL3:0
14CK + 1K (1024) + 64 ms
14CK + 1K (1024) + 4 ms
Start-up Times for the PLLCK
Internal Calibrated Oscillator Operating Modes
Start-up Times for the Internal Calibrated Oscillator Clock Selection
0010
Table
Start-up Time from
and
from Power-down
Power Down
(1)
186.
Start-up Time
“Internal Oscillators” on page 218
6-5.
6 CK
6 CK
6 CK
“System Clock Prescaler” on page 31
Power-On-Reset (V
Additional Delay from
Additional Delay from
Reset (V
Reserved
14CK + 64 ms
14CK + 4 ms
14CK
4 ms
4 ms
4 ms
4 ms
CC
Nominal Frequency
for more details. The device is shipped
(1)
= 5.0V)
CC
8.0 MHz
= 5.0V)
(2)
Recommended
Usage
BOD enabled
Fast rising power
Slowly rising power
Recommended
usage
BOD enabled
Fast rising power
Slowly rising power
Slowly rising power
for more details.
8197B–AVR–01/10
CC
), the
Table
Table
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