ST7FLITE09Y0B6 FARNELL, ST7FLITE09Y0B6 Datasheet - Page 103
ST7FLITE09Y0B6
Manufacturer Part Number
ST7FLITE09Y0B6
Description
IC, 8BIT MCU, ST7, 16MHZ, DIP-16
Manufacturer
FARNELL
Datasheet
1.ST7FLITE05Y0B6.pdf
(124 pages)
Specifications of ST7FLITE09Y0B6
Controller Family/series
ST7
No. Of I/o's
13
Eeprom Memory Size
128Byte
Ram Memory Size
128Byte
Cpu Speed
16MHz
No. Of Timers
2
Core Size
8 Bit
Program Memory Size
1.5 Kb
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FLITE09Y0B6
Manufacturer:
Maestro
Quantity:
1 200
Company:
Part Number:
ST7FLITE09Y0B6
Manufacturer:
STMicroelectronics
Quantity:
135
COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
Figure 79. SPI Slave Timing Diagram with CPHA=1
Figure 80. SPI Master Timing Diagram
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends of the I/O port configuration.
MISO
MOSI
MISO
MOSI
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
SS
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
OUTPUT
INPUT
INPUT
OUTPUT
INPUT
INPUT
see
note 2
See note 2
t
a(SO)
t
su(SS)
HZ
t
t
t
su(MI)
w(SCKH)
w(SCKL)
t
su(SI)
MSB OUT
MSB IN
MSB OUT
t
MSB IN
h(MI)
1)
t
h(SI)
t
c(SCK)
t
c(SCK)
t
t
t
v(MO)
w(SCKH)
w(SCKL)
t
v(SO)
DD
and 0.7xV
BIT6 OUT
1)
BIT6 IN
BIT6 OUT
DD
.
BIT1 IN
t
h(MO)
t
h(SO)
ST7LITE0xY0, ST7LITESxY0
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB OUT
LSB IN
LSB OUT
LSB IN
t
h(SS)
See note 2
t
dis(SO)
103/124
note 2
see