CS4362-KQZ Cirrus Logic Inc, CS4362-KQZ Datasheet - Page 31

IC,Audio Processor,QFP,48PIN,PLASTIC

CS4362-KQZ

Manufacturer Part Number
CS4362-KQZ
Description
IC,Audio Processor,QFP,48PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS4362-KQZ

Number Of Bits
24
Data Interface
Serial
Number Of Converters
6
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
390mW
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1644

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS4362-KQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
CS4362-KQZR
Manufacturer:
STM
Quantity:
2 332
DS257F2
7.4
7.4.1
SPI Format
In SPI format, CS is the CS4362 chip select signal, CCLK is the control port bit clock, CDIN is the input data
line from the microcontroller and the chip address is 0011000. CS, CCLK and CDIN are all inputs and data
is clocked in on the rising edge of CCLK.
Note:
Writing in SPI
Figure 8
first 7 bits on CDIN form the chip address and must be 0011000. The eighth bit is a read/write indicator
(R/W), which must be low to write. The next 8 bits form the Memory Address Pointer (MAP), which is set
to the address of the register that is to be updated. The next 8 bits are the data which will be placed into
register designated by the MAP. To write multiple registers, keep CS low and continue providing clocks
on CCLK. End the read transaction by setting CS high.
S D A
S C L
N o te : If o p e r a tio n is a w r ite , th is b y te c o n ta in s th e M e m o ry A d d r e s s P o in te r , M A P .
C C L K
C S
C D I N
The CS4362 is write-only when in SPI format.
shows the operation of the control port in SPI format. To write to a register, bring CS low. The
S ta rt
0 0 1 1 0 0
M A P = M e m o r y A d d r e s s P o i n t e r
A D D R E S S
0 0 1 1 0 0 0
C H I P
Figure 8. Control Port Timing, SPI Format
Figure 7. Control Port Timing, I²C Format
A D D R
A D 0
R /W
R / W
A C K
M A P
D A T A
1 -8
N o te 1
M S B
b y t e 1
A C K
D A T A
D A T A
1 -8
b y t e n
L S B
A C K
S to p
CS4362
31

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