PIC12F1822-I/SN Microchip Technology, PIC12F1822-I/SN Datasheet - Page 231

• Manufacturer Part Number: PIC12F1822-I/SN
• Description: 3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 S
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12F1822-I/SN

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• No. Of I/o's: 6
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 128Byte
• Embedded Interface Type: AUSART, EUSART, I2C, SPI
• No. Of Pins: 8
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Processor Series: PIC12F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

25.0
25.1
The Master Synchronous Serial Port (MSSP1) module
is a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSP1 module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The SPI interface supports the following modes and
features:
• Master mode
• Slave mode
• Clock Parity
• Slave Select Synchronization (Slave mode only)
• Daisy-chain connection of slave devices
Figure 25-1
module.
FIGURE 25-1:
 2010 Microchip Technology Inc.
MASTER SYNCHRONOUS
SERIAL PORT MODULE
Master SSP (MSSP1) Module
Overview
is a block diagram of the SPI interface
MSSP1 BLOCK DIAGRAM (SPI MODE)
2
C™)
SCK
SDO
SDI
SS
PIC12F/LF1822/PIC16F/LF1823
Read
SS Control
TRIS bit
bit 0
Enable
Select
Select
Edge
Edge
Preliminary
SSP1BUF Reg
SSP1SR Reg
SSP1M<3:0>
4
Clock
Shift
Write
(
Prescaler
Data Bus
4, 16, 64
TMR2 Output
Baud rate
generator
(SSP1ADD)
2 (CKP, CKE)
2
Clock Select
T
OSC
)
DS41413B-page 231