CS4362-KQ Cirrus Logic Inc, CS4362-KQ Datasheet - Page 30

• Manufacturer Part Number: CS4362-KQ
• Description: D/A Converter (D-A) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS4362-KQ

• No. Of Pins: 48
• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 5.5V
• No. Of Bits: 24 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Interface Type: Serial
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

6.4
In SPI format, CS is the CS4362 chip select signal,
CCLK is the control port bit clock, CDIN is the in-
put data line from the microcontroller and the chip
address is 0011000. CS, CCLK and CDIN are all
inputs and data is clocked in on the rising edge of
CCLK.
Note that the CS4362 is write-only when in SPI
format.
6.4.1
Figure 8 shows the operation of the control port in
SPI format. To write to a register, bring CS low.
30
SPI Format
Writing in SPI
S D A
S C L
N o t e : I f o p e r a t io n i s a w r it e , th is b y t e c o n t a in s t h e M e m o ry A d d r e s s P o in t e r , M A P .
C C L K
C S
C D I N
S ta rt
0 0 1 1 0 0
M A P = M e m o r y A d d r e s s P o i n t e r
A D D R E S S
0 0 1 1 0 0 0
Figure 7. Control Port Timing, I
C H I P
Figure 8. Control Port Timing, SPI Format
A D D R
A D 0
R /W
R / W
A C K
The first 7 bits on CDIN form the chip address and
must be 0011000. The eighth bit is a read/write in-
dicator (R/W), which must be low to write. The
next 8 bits form the Memory Address Pointer
(MAP), which is set to the address of the register
that is to be updated. The next 8 bits are the data
which will be placed into register designated by the
MAP. To write multiple registers, keep CS low and
continue providing clocks on CCLK. End the read
transaction by setting CS high.
M A P
D A T A
1 - 8
N o t e 1
2
C Format
M S B
b y t e 1
A C K
D A T A
D A T A
1 -8
b y t e n
L S B
A C K
S to p
CS4362
DS257F1