DP83910AV National Semiconductor, DP83910AV Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
DP83910AV
Manufacturer Part Number
DP83910AV
Description
CMOS SERIAL NETWORK INTERFACE
Manufacturer
National Semiconductor
Datasheet
1.DP83910AV.pdf
(12 pages)
Specifications of DP83910AV
Rohs Compliant
NO
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DP83910AV
Manufacturer:
NSC
Quantity:
5 510
Company:
Part Number:
DP83910AV
Manufacturer:
VISHAY
Quantity:
5 510
Part Number:
DP83910AV
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
DP83910AV/63
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
DP83910AV/63SN
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
DP83910AV/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
6 0 Pin Descriptions
24-Pin DIP
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
28-Pin PCC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
7
8
9
6
Name
COL
RXD
CRS
RXC
SEL
V
V
V
LBK
X1
X2
TXD
TXC
TXE
TX
TX
NC
NC
TEST
V
V
V
V
NC
RX
CD
CD
RX
SS
SS
SS
DD
DD
DD
DD
b
a
b
b
a
a
I O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
COLLISION DETECT OUTPUT Generates an active high signal when
10 MHz collision signal is detected
RECEIVE DATA OUTPUT NRZ data output from the PLL This signal
must be sampled on the rising edge of receive clock
CARRIER SENSE Asserted on the first valid high-to-low transition on
the RX
data
RECEIVE CLOCK The receive clock from the Manchester data after
the PLL has locked Remains active 5 bit times after deasserting CRS
MODE SELECT When high transmit
voltage in the idle state When low transmit
to transmit
GROUND PIN
LOOPBACK When high the loopback mode is enabled
CRYSTAL OR EXTERNAL OSCILLATOR INPUT
CRYSTAL FEEDBACK OUTPUT Used in crystal connections only
Connected to ground when using an external oscillator
TRANSMIT DATA INPUT NRZ data input from the controller The
data is combined with the transmit clock to produce Manchester data
TXD is sampled on the rising edge of transmit clock
TRANSMIT CLOCK The 10 MHz clock derived from the 20 MHz
oscillator
TRANSMIT ENABLE The encoder begins operation when this input is
asserted high
TRANSMIT OUTPUT Differential line driver which sends the encoded
data to the transceiver The outputs are source followers which require
270
NO CONNECTION This may be tied to V
compatible with the DP8391
NO CONNECTION
FACTORY TEST INPUT Used to check the chip’s internal functions
May be tied low or have a 0 01 f bypass capacitor to ground (for
compatibility with the bipolar DP8391) during normal operation
POWER CONNECTION
NO CONNECTION
RECEIVE INPUT Differential receive input pair from the transceiver
COLLISION INPUT Differential collision pair input from the
transceiver
pull-down resistors
5
g
pair Remains active until 1 5 bit times after the last bit in
b
in the idle state at the transformer’s primary
Description
a
and transmit
SS
a
for the PLCC version to be
is positive with respect
b
are the same