DP83910AV National Semiconductor, DP83910AV Datasheet - Page 8

• Manufacturer Part Number: DP83910AV
• Description: CMOS SERIAL NETWORK INTERFACE
• Manufacturer: National Semiconductor

Specifications of DP83910AV

• Rohs Compliant: NO

9 0 Switching Characteristics
Transmit Specifications (End of Packet)
Receiver Specifications (Start of Packet)
Note 1 This parameter is measured using the fifty percent point of each clock edge
Note 2 This parameter was characterized with a differential input of
Symbol
t
t
t
Symbol
t
t
t
t
t
t
t
t
t
TXEh
TOh
TOi
RCd
RCr
RCf
CRSon
DAT
RDd
RDs
Dtor
RDV
Receive Clock Duty Cycle (Note 1)
Receive Clock Rise Time (20% to 80% C
Receive Clock Fall Time (80% to 20% C
Carrier Sense Turn On Delay
Decoder Acquisition Time
Receive Data Output Delay
Receive Data Output Stable after Going Valid
Differential Inputs Turn-On Pulse (Note 2)
Receive Data Output Valid from Falling Edge of RXC
Transmit Enable Hold Time from Rising Edge of TXC
Transmit Output High before Idle (Half Step)
Transmit Output Idle Time (Half Step)
Parameter
Parameter
Transmit Timing (End of Packet)
Receive Timing (Start of Packet)
(Continued)
b
375 mV on the receive pair inputs
8
TL
TL
e
e
30 pF)
30 pF)
Min
200
Min
0
40
90
30
TL F 9365– 5
8000
Max
TL F 9365 – 6
Max
700
150
60
70
10
7
7
Units
Units
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns