DSPIC30F2023-20E/PT Microchip Technology, DSPIC30F2023-20E/PT Datasheet - Page 183
DSPIC30F2023-20E/PT
Manufacturer Part Number
DSPIC30F2023-20E/PT
Description
12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 TQFP 10x10x1
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2023-20E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Package
44TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
35
Interface Type
I2C/SPI/UART
On-chip Adc
12-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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- AC164335 PDF datasheet
- DM300023 PDF datasheet #2
- DM300023 PDF datasheet #3
- DSPIC30F2011-20ISO PDF datasheet #4
- DSPIC30F2011-20IP PDF datasheet #5
- DSPIC30F1010-30ISO PDF datasheet #6
- DSPIC30F1010-30ISO PDF datasheet #7
- Current page: 183 of 286
- Download datasheet (5Mb)
16.4
The ADC module contains up to 12 data output regis-
ters to store the A/D results called ADCBUF<11:0>.
The registers are 10 bits wide, but are read into differ-
ent format, 16-bit words. The buffers are read-only.
Each analog input has a corresponding data
output register.
This module DOES NOT include a circular data
buffer or FIFO. Because the conversion results may
be produced in any order, such schemes will not work
since there would be no means to determine which
data is in a specific location.
The SAR write to the buffers is synchronous to the
ADC clock. Reads from the buffers will always have
valid data assuming that the data-ready interrupt has
been processed.
If a buffer location has not been read by the software
and the SAR needs to overwrite that location, the
previous data is lost.
Reads from the result buffer pass through the data for-
matter. The 10 bits of the result data are formatted into
a 16-bit word.
FIGURE 16-2:
© 2006 Microchip Technology Inc.
PWM
Measuring peak inductor current is very important
I
I
R
L
Desired sample point
ADC Result Buffer
Critical Edge
APPLICATION EXAMPLE: IMPORTANCE OF PRECISE SAMPLING
X
X
X
Late sample yields
zero data
Preliminary
16.5
The ADC module implements a concept based on
“Conversion Pairs”. In power conversion applications,
there is a need to measure voltages and currents for
each PWM control loop. The ADC module enables the
sample and conversion process of each conversion
pair to be precisely timed relative to the PWM signals.
In a user’s application circuit, the PWM signal enables
a transistor, which allows an inductor to charge up with
current to a desired value. The longer a PWM signal is
on, the longer the inductor is charging, and therefore
the inductor current is at its maximum at the end of the
PWM signal. Often, this is the point where the user
wants to take the current and voltage measurements.
Figure 16-2 shows a typical power conversion applica-
tion (a boost converter) where the current sensing of
the inductor is done by monitoring the voltage across a
resistor in series with the power transistor that
“charges” the inductor. The significant feature of this
figure is that if the sampling of the resistor voltage
occurs slightly later than the desired sample point, the
data read will be zero. This is not acceptable in most
applications. The ADC module always samples the
analog voltages at the appointed time regardless of
whether the ADC converter is busy or not.
The Power Supply PWM module supports 2-4 indepen-
dent PWM channels as well as 2-4 trigger signals (one
per PWM generator). The user can configure these
channels to initiate an ADC conversion of a selected
input pair at the proper time in the PWM cycle. The
Power Supply PWM module also provides an addi-
tional trigger signal (Special Event Trigger), which can
be programmed to occur at a specified time during the
primary time base count cycle.
+V
dsPIC30F1010/202X
IN
PWM
V
Application Information
ISENSE
Example Boost Converter
L
I
L
R
I
R
DS70178C-page 181
+
C
V
OUT
OUT
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