DSPIC30F3011-20E/PT Microchip Technology, DSPIC30F3011-20E/PT Datasheet - Page 38
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DSPIC30F3011-20E/PT
Manufacturer Part Number
DSPIC30F3011-20E/PT
Description
IC,DSP,16-BIT,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F3010-30ISO.pdf
(228 pages)
4.DSPIC30F3010-30ISO.pdf
(18 pages)
5.DSPIC30F3010-30ISO.pdf
(6 pages)
6.DSPIC30F3010-30ISO.pdf
(16 pages)
7.DSPIC30F3010-30ISO.pdf
(22 pages)
Specifications of DSPIC30F3011-20E/PT
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F3011-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Table 11-4
bulk-erasing program memory. This process includes
the ICSP command code, which must be transmitted
(for each instruction) to the Least Significant bit first
using the PGC and PGD pins (see
If an individual Segment Erase operation is required,
the NVMCON value must be replaced by the value for
the corresponding Segment Erase operation.
TABLE 11-4:
DS70102K-page 38
Step 1: Exit the Reset vector.
0000
0000
0000
Step 2: Set NVMCON to program the FBS Configuration register.
0000
0000
Step 3: Initialize the TBLPAG and write pointer (W7) for TBLWT instruction for Configuration register.
0000
0000
0000
Step 4: Load the Configuration Register data to W6.
0000
0000
Step 5: Load the Configuration Register write latch. Advance W7 to point to next Configuration register.
0000
Step 6: Unlock the NVMCON for programming the Configuration register.
0000
0000
0000
0000
Step 7: Initiate the programming cycle.
0000
0000
0000
—
0000
0000
0000
0000
0000
Step 8: Repeat steps 5-7 one time to program 0x0000 to RESERVED2 Configuration register.
Step 9: Set the NVMCON to erase all Program Memory.
00000
0000
Step 10: Unlock the NVMCON for programming.
Note 1:
Command
Note:
(Binary)
shows the ICSP programming process for
Steps 2-8 are only required for the dsPIC30F5011/5013 devices. These steps may be skipped for all other
devices in the dsPIC30F family.
Program memory must be erased before
writing any data to program memory.
040100
040100
000000
24008A
883B0A
200F80
880190
200067
EB0300
000000
BB1B86
200558
200AA9
883B38
883B39
A8E761
000000
000000
—
000000
000000
A9E761
000000
000000
2407FA
883B0A
(Hexadecimal)
SERIAL INSTRUCTION EXECUTION FOR BULK ERASING PROGRAM MEMORY
(ONLY IN NORMAL-VOLTAGE SYSTEMS)
Data
Figure
GOTO 0x100
GOTO 0x100
NOP
MOV
MOV
MOV
MOV
MOV
CLR
NOP
TBLWTL W6, [W7++]
MOV
MOV
MOV
MOV
BSET NVMCON, #WR
NOP
NOP
Externally time 2 ms
NOP
NOP
BCLR NVMCON, #WR
NOP
NOP
MOV
MOV
(1)
11-2).
#0x55, W8
#0xAA, W9
W8, NVMKEY
W9, NVMKEY
#0x4008, W10
W10, NVMCON
#0xF8, W0
W0, TBLPAG
#0x6, W7
W6
#0x407F, W10
W10, NVMCON
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Description
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© 2010 Microchip Technology Inc.
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