DSPIC30F4011-20E/ML Microchip Technology, DSPIC30F4011-20E/ML Datasheet - Page 144

• Manufacturer Part Number: DSPIC30F4011-20E/ML
• Description: IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4011-20E/ML

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: DSPIC30F401120EML

dsPIC30F4011/4012
The configuration guidelines give the required setup
values for the conversion speeds above 500 ksps,
since they require external V
are some differences in the configuration procedure.
Configuration details that are not critical to the
conversion speed have been omitted.
Figure 20-2
conversion rates above 500 ksps.
FIGURE 20-2:
20.7.1
The configuration for 1 Msps operation is dependent on
whether a single input pin is to be sampled or whether
multiple pins are to be sampled.
20.7.1.1
For conversions at 1 Msps for a single analog input, at
least two sample and hold channels must be enabled.
The analog input multiplexer must be configured so
that the same input pin is connected to both sample
and hold channels. The A/D converts the value held on
one S&H channel while the second S&H channel
acquires a new input sample.
DS70135G-page 144
R2
10
V
1 Msps CONFIGURATION
GUIDELINE
illustrates the recommended circuit for the
DD
Single Analog Input
C2
0.1 μF
A/D CONVERTER VOLTAGE REFERENCE SCHEMATIC
V
DD
C1
0.01 μF
REF
pins usage and there
1
V
V
11
SS
DD
dsPIC30F4011
V
DD
V
DD
R1
10
V
V
33
DD
23
SS
20.7.1.2
The ADC can also be used to sample multiple analog
inputs using multiple sample and hold channels. In this
case, the total 1 Msps conversion rate is divided among
the different input signals. For example, four inputs can
be sampled at a rate of 250 ksps for each signal, or two
inputs could be sampled at a rate of 500 ksps for each
signal. Sequential sampling must be used in this
configuration to allow adequate sampling time on each
input.
V
Multiple Analog Inputs
DD
V
V
DD
DD
C8
1 μF
C5
1 μF
© 2010 Microchip Technology Inc.
V
V
DD
DD
C7
0.1 μF
C4
0.1 μF
V
V
DD
DD
C6
0.01 μF
C3
0.01 μF