DSPIC30F4013-20E/ML Microchip Technology, DSPIC30F4013-20E/ML Datasheet - Page 51
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DSPIC30F4013-20E/ML
Manufacturer Part Number
DSPIC30F4013-20E/ML
Description
IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F3014-30IPT.pdf
(228 pages)
3.DSPIC30F3014-30IPT.pdf
(16 pages)
4.DSPIC30F3014-30IPT.pdf
(6 pages)
5.DSPIC30F3014-30IPT.pdf
(14 pages)
6.DSPIC30F3014-30IPT.pdf
(20 pages)
Specifications of DSPIC30F4013-20E/ML
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F401320EML
11.11 Reading Configuration Memory
The procedure for reading configuration memory is
similar to the procedure for reading code memory,
except that 16-bit data words are read instead of 24-bit
words. Since there are seven Configuration registers,
they are read one register at a time.
TABLE 11-11:
© 2010 Microchip Technology Inc.
Step 1: Exit the Reset vector.
0000
0000
0000
Step 2: Initialize TBLPAG, and the read pointer (W6) and the write pointer (W7) for TBLRD instruction.
0000
0000
0000
0000
0000
Step 3: Read the Configuration register and write it to the VISI register (located at 0x784).
0000
0000
0000
0000
0000
Step 4: Output the VISI register using the REGOUT command.
0001
0000
Step 5: Reset device internal PC.
0000
0000
Step 6: Repeat steps 3-5 six times to read all of configuration memory.
Command
(Binary)
(Hexadecimal)
040100
040100
000000
200F80
880190
EB0300
EB0380
000000
BA0BB6
000000
000000
883C20
000000
<VISI>
000000
040100
000000
SERIAL INSTRUCTION EXECUTION FOR READING ALL CONFIGURATION MEMORY
Data
GOTO 0x100
GOTO 0x100
NOP
MOV
MOV
CLR
CLR
NOP
TBLRDL [W6++], [W7]
NOP
NOP
MOV
NOP
Clock out contents of VISI register
NOP
GOTO 0x100
NOP
#0xF8, W0
W0, TBLPAG
W6
W7
W0, VISI
Table 11-11
reading all of the configuration memory. Note that the
TBLPAG register is hard-coded to 0xF8 (the upper byte
address of configuration memory), and the read pointer
W6 is initialized to 0x0000.
Description
shows the ICSP programming details for
DS70102K-page 51