LM12L458CIV National Semiconductor, LM12L458CIV Datasheet - Page 15

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LM12L458CIV

Manufacturer Part Number
LM12L458CIV
Description
A/D Converter (A-D) IC
Manufacturer
National Semiconductor
Datasheet

Specifications of LM12L458CIV

Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Timing Diagrams
= 3 ns, C
outputs.
10: ALE low to WR low
1, 3: CS or Address valid to ALE low set-up time.
2, 4: CS or Address valid to ALE low hold time.
5: ALE pulse width
6: RD high to next ALE high
7: ALE low to RD low
8: RD pulse width
9: RD high to next RD or WR low
L
= 100 pF for the INT, DMARQ, D0–D15
V
A
+ = V
D
+ = +3.3V, t
FIGURE 10. Multiplexed Data Bus
R
= t
F
15
11: WR pulse width
12: WR high to next ALE high
13: WR high to next WR or RD low
14: Data valid to WR high set-up time
15: Data valid to WR high hold time
16: RD low to data bus out of TRI-STATE
17: RD high to TRI-STATE
18: RD low to data valid (access time)
01171119
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