LM12L458CIV National Semiconductor, LM12L458CIV Datasheet - Page 4
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LM12L458CIV
Manufacturer Part Number
LM12L458CIV
Description
A/D Converter (A-D) IC
Manufacturer
National Semiconductor
Datasheet
1.LM12L458CIV.pdf
(29 pages)
Specifications of LM12L458CIV
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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V
V
V
PSS
C
C
t
t
t
t
t
t
t
C
A
Z
CAL
WD
PU
WU
Symbol
IN+
IN−
IN+
REF
IN
Converter Characteristics
The following specifications apply for V
6.0 MHz, R
age, and minimum acquisition time unless otherwise specified. Boldface limits apply for T
limits T
Converter AC Characteristics
The following specifications apply for V
6.0 MHz, R
voltage, and minimum acquisition time unless otherwise specified. Boldface limits apply for T
limits T
Symbol
− V
IN−
A
A
Clock Duty Cycle
Conversion Time
Acquisition Time
Auto-Zero Time
Full Calibration Time
Throughput Rate (Note 18)
“Watchdog” Mode Comparison
Time
Power-Up Time
Wake-Up Time
= T
= T
S
S
J
J
= 25Ω, source impedance for V
= 25Ω, source impedance for V
= 25˚C. (Notes 6, 7, 8, 9)
= 25˚C. (Notes 6, 7, 8, 9)
8-Bit + Sign and “Watchdog” Mode DC
Common Mode Error
Multiplexer Channel-to-Channel
Matching
Non-Inverting Input Range
Inverting Input Range
Differential Input Voltage Range
Common Mode Input Voltage Range
Power Supply
Sensitivity
(Note 15)
V
Selected Multiplexer Channel Input
Capacitance
REF+
/V
Parameter
REF−
Input Capacitance
Parameter
Zero Error
Full-Scale Error
Linearity Error
A
A
+ = V
+ = V
13-Bit Resolution, Sequencer
State S5 (Figure 15)
9-Bit Resolution, Sequencer State
S5 (Figure 15)
Sequencer State S7 (Figure 15)
Built-in minimum for 13-Bits
Built-in minimum for 9-Bits and
“Watchdog” mode
Sequencer State S2 (Figure 15)
Sequencer State S2 (Figure 15)
Sequencer States S6, S4, and S5
(Figure 15)
(Continued)
REF+
REF+
D
D
+ = +3.3V, V
+ = +3.3V, V
and V
and V
Conditions
V
V
REF−
REF−
A
REF+
+ = V
REF+
REF+
≤ 25Ω, fully-differential input with fixed 1.25V common-mode volt-
≤ 25Ω, fully-differential input with fixed +1.25V common-mode
= 2.5V, V
4
D
= +2.5V, V
+ = +3.3V
= +2.5V, V
Conditions
REF−
±
REF−
REF−
= GND
10%
4944 (t
= 0V, 12-bit + sign conversion mode, f
= 0V, 12-bit + sign conversion mode, f
(Note 10)
44 (t
21 (t
76 (t
11 (t
Typical
9 (t
2 (t
107
50
10
10
CLK
CLK
CLK
CLK
CLK
CLK
CLK
)
)
)
)
)
)
(Note 10)
Typical
)
A
±
±
±
±
±
0.05
85
75
= T
1/8
0.2
0.4
0.2
A
4944 (t
44 (t
21 (t
76 (t
11 (t
J
= T
9 (t
2 (t
= T
J
(Note 11)
CLK
CLK
CLK
CLK
CLK
CLK
Limits
MIN
= T
CLK
(Note 11)
106
40
60
) + 50 ns
) + 50 ns
Limits
) + 50 ns
) + 50 ns
) + 50 ns
) + 50 ns
±
GND
GND
−V
GND
MIN
to T
V
V
V
V
) + 50 ns
1.75
±
A
A
A
A
A
2
+
+
+
+
+
to T
MAX
MAX
; all other
LSB (max)
LSB (max)
; all other
V (max)
V (max)
V (max)
V (max)
V (min)
V (min)
V (min)
V (min)
kHz (min)
% (max)
Units
% (min)
CLK
CLK
LSB
LSB
LSB
(max)
(max)
(max)
(max)
(max)
(max)
(max)
Units
pF
pF
ms
ms
=
=