MF10CCWM National Semiconductor, MF10CCWM Datasheet - Page 5

• Manufacturer Part Number: MF10CCWM
• Description: IC,FILTER,AP/BP/HP/LP/NOTCH,CMOS,SOP,20PIN,PLASTIC
• Manufacturer: National Semiconductor

Specifications of MF10CCWM

• Rohs Compliant: NO

Typical Performance Characteristics
Pin Descriptions
LP(1 20) BP(2 19) The second order lowpass bandpass
N AP HP(3 18)
INV(4 17)
S1(5 16)
f
vs Clock Frequency
CLK
f
O
and notch allpass highpass outputs
These outputs can typically sink 1 5 mA
and source 3 mA Each output typically
swings to within 1V of each supply
The inverting input of the summing op-
amp of each filter These are high im-
pedance inputs but the non-inverting in-
put is internally tied to AGND making
INV
junctions (low impedance current in-
puts)
S1 is a signal input pin used in the all-
pass filter configurations (see modes 4
and 5) The pin should be driven with a
source impedance of less than 1 k
S1 is not driven with a signal it should be
tied to AGND (mid-supply)
Deviation
A
and INV
B
behave like summing
f
vs Clock Frequency
Deviation of
vs Nominal Q
CLK
If
f
O
Deviation
(Continued)
5
S
V
V
f
CLK
f
A B
A
A
O
a
b
(14) V
(7) V
(6)
D
a
D
b
(8)
(13) Analog and digital negative supplies
This pin activates a switch that connects
one of the inputs of each filter’s second
summer to either AGND (S
V
tied to V
needed for configuring the filter in its
various modes of operation
Analog positive supply and digital posi-
tive supply These pins are internally
connected through the IC substrate and
therefore V
rived from the same power supply
source They have been brought out
separately so they can be bypassed by
separate capacitors if desired They
can be externally tied together and by-
passed by a single capacitor
The same comments as for V
V
b
D
a
) or to the lowpass (LP) output (S
apply here
Deviation of
vs Nominal Q
a
A
) This offers the flexibility
a
and V
D
f
CLK
a
f
O
should be de-
A B
TL H 10399 – 3
A
tied to
a
and
A B