PIC10F200-E/P Microchip Technology, PIC10F200-E/P Datasheet - Page 22

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PIC10F200-E/P

Manufacturer Part Number
PIC10F200-E/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 10Fr

Specifications of PIC10F200-E/P

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
3
Program Memory Size
384B (256 x 12)
Program Memory Type
FLASH
Ram Size
16 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
AC162059 - HEADER INTRFC MPLAB ICD2 8/14PINAC164037 - MODULE SKT 6L PROMATE II SOT23
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC10F200-E/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC10F200/202/204/206
4.5
The OPTION register is a 8-bit wide, write-only register,
which contains various control bits to configure the
Timer0/WDT prescaler and Timer0.
By executing the OPTION instruction, the contents of
the W register will be transferred to the OPTION regis-
ter. A Reset sets the OPTION<7:0> bits.
REGISTER 4-2:
DS41239D-page 20
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
.
GPWU
W-1
OPTION Register
GPWU: Enable Wake-up on Pin Change bit (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
GPPU: Enable Weak Pull-ups bit (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
T0CS: Timer0 Clock Source Select bit
1 = Transition on T0CKI pin (overrides TRIS on the T0CKI pin)
0 = Transition on internal instruction cycle clock, F
T0SE: Timer0 Source Edge Select bit
1 = Increment on high-to-low transition on the T0CKI pin
0 = Increment on low-to-high transition on the T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to Timer0
PS<2:0>: Prescaler Rate Select bits
GPPU
W-1
OPTION REGISTER
Bit Value Timer0 Rate WDT Rate
000
001
010
011
100
101
110
111
W = Writable bit
‘1’ = Bit is set
T0CS
W-1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
T0SE
W-1
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PSA
W-1
Note:
Note:
OSC
/4
If TRIS bit is set to ‘0’, the wake-up on
change and pull-up functions are disabled
for that pin (i.e., note that TRIS overrides
Option control of GPPU and GPWU).
If the T0CS bit is set to ‘1’, it will override
the TRIS function on the T0CKI pin.
PS2
W-1
© 2007 Microchip Technology Inc.
x = Bit is unknown
W-1
PS1
W-1
PS0
bit 0

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