PIC12CE519-04E/SN Microchip Technology, PIC12CE519-04E/SN Datasheet - Page 56
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12CE519-04E/SN
Manufacturer Part Number
PIC12CE519-04E/SN
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519-04E/SN
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 56 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
3.2.4
DS31003A-page 3-6
INTERNAL RESET
PWRT TIME-OUT
INTERNAL POR
OST TIME-OUT
Power-up Sequence
MCLR
V
DD
Note 1: Devices with the Internal/External RC option have a nominal 250 s delay.
On power-up, the time-out sequence is as follows: First the internal POR is detected, then, if
enabled, the PWRT time-out is invoked. After the PWRT time-out is over, the OST is activated.
The total time-out will vary based on oscillator configuration and PWRTE bit status. For example,
in RC mode with the PWRTE bit set (PWRT disabled), there will be no time-out at all.
Figure 3-6
Since the time-outs occur from the internal POR pulse, if MCLR is kept low long enough, the
time-outs will expire. Then bringing MCLR high will begin execution immediately
This is useful for testing purposes or to synchronize more than one device operating in parallel.
If the device voltage is not within the electrical specifications by the end of a time-out, the
MCLR/V
external RC delay is sufficient for many of these applications.
Table 3-1
Figure 3-8
Table 3-1:
Figure 3-5: Time-out Sequence on Power-up (MCLR Tied to V
Configuration
XT, HS, LP
Oscillator
RC
PP
shows the time-outs that occur in various situations, while
and
show four different cases that can happen on powering up the device.
pin must be held low until the voltage is within the device specification. The use of an
Time-out in Various Situations
Figure 3-7
72 ms + 1024T
Enabled
72 ms
depict time-out sequences.
Power-up Timer
T
PWRT
OSC
1024T
Disabled
T
OST
—
(1)
OSC
72 ms + 1024T
Brown-out Reset
72 ms
DD
1997 Microchip Technology Inc.
)
OSC
Figure 3-5
(Figure
1024T
Wake-up
Figure
SLEEP
from
—
through
(1)
OSC
3-7).
3-5,
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