PIC12F508-E/MS Microchip Technology, PIC12F508-E/MS Datasheet - Page 19
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PIC12F508-E/MS
Manufacturer Part Number
PIC12F508-E/MS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TSSOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F509T-ISN.pdf
(110 pages)
2.PIC12F509T-ISN.pdf
(4 pages)
3.PIC12F509T-ISN.pdf
(20 pages)
Specifications of PIC12F508-E/MS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
768B (512 x 12)
Program Memory Type
FLASH
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
25 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164101, DM163014, DV164120, DM163029
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
AC162059 - HEADER INTRFC MPLAB ICD2 8/14PINAC164325 - MODULE SKT FOR 8MSOPDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICE
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
FIGURE 4-3:
FIGURE 4-5:
© 2009 Microchip Technology Inc.
Note 1: Not a physical register. See Section 4.9
File Address
Note 1: Not a physical register. See Section 4.9 “Indirect Data Addressing: INDF and FSR Registers”.
File Address
“Indirect Data Addressing: INDF and
FSR Registers”.
FSR<6:5>
1Fh
00h
01h
02h
03h
04h
05h
06h
07h
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
PIC12F508 REGISTER
FILE MAP
PIC16F505 REGISTER FILE MAP
Registers
OSCCAL
Purpose
General
1Fh
STATUS
10h
INDF
TMR0
GPIO
FSR
PCL
General
Purpose
Registers
OSCCAL
General
Purpose
Registers
STATUS
(1)
PORTB
PORTC
INDF
Bank 0
TMR0
PCL
FSR
00
(1)
30h
3Fh
2Fh
20h
General
Purpose
Registers
Bank 1
01
PIC12F508/509/16F505
Addresses map back to
addresses in Bank 0.
50h
5Fh
4Fh
40h
FIGURE 4-4:
File Address
General
Purpose
Registers
FSR<5>
Note 1: Not a physical register. See Section 4.9
Bank 2
10
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
“Indirect Data Addressing: INDF and FSR
Registers”.
1Fh
10h
70h
7Fh
6Fh
60h
General
Purpose
Registers
OSCCAL
General
Purpose
Registers
STATUS
INDF
General
Purpose
Registers
Bank 0
TMR0
GPIO
PCL
FSR
Bank 3
PIC12F509 REGISTER
FILE MAP
0
11
(1)
30h
3Fh
2Fh
20h
Addresses map
back to
addresses
in Bank 0.
General
Purpose
Registers
DS41236E-page 19
Bank 1
1