PIC16F687-E/P Microchip Technology, PIC16F687-E/P Datasheet - Page 150

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,20PIN,PLASTIC

PIC16F687-E/P

Manufacturer Part Number
PIC16F687-E/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F687-E/P

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP, EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
12
Height
3.3 mm
Length
26.16 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOICDM163029 - BOARD PICDEM FOR MECHATRONICSACICE0203 - MPLABICE 20P 300 MIL ADAPTER
Lead Free Status / Rohs Status
 Details
PIC16F631/677/685/687/689/690
11.4.7.1
The STRSYNC bit of the PSTRCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRCON register. In this case, the
output signal at the P1<D:A> pins may be an
incomplete PWM waveform. This operation is useful
when the user firmware needs to immediately remove
a PWM signal from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
FIGURE 11-20:
FIGURE 11-21:
DS41262E-page 148
P1<D:A>
P1<D:A>
STRn
PWM
STRn
PWM
Steering Synchronization
PORT Data
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRSYNC = 1)
PWM Period
PORT Data
P1n = PWM
Figures 11-20 and 11-21 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
P1n = PWM
PORT Data
© 2008 Microchip Technology Inc.
PORT Data

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