PIC16F687-E/P Microchip Technology, PIC16F687-E/P Datasheet - Page 258

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,20PIN,PLASTIC

PIC16F687-E/P

Manufacturer Part Number
PIC16F687-E/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F687-E/P

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP, EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
12
Height
3.3 mm
Length
26.16 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOICDM163029 - BOARD PICDEM FOR MECHATRONICSACICE0203 - MPLABICE 20P 300 MIL ADAPTER
Lead Free Status / Rohs Status
 Details
PIC16F631/677/685/687/689/690
FIGURE 17-18:
TABLE 17-16: A/D CONVERSION REQUIREMENTS
DS41262E-page 256
Standard Operating Conditions (unless otherwise stated)
Operating Temperature
130*
131
132*
134
Note 1:
Param
No.
2:
A/D Data
Note 1: If the A/D clock source is selected as RC, a time of T
A/D CLK
*
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
BSF ADCON0, GO
ADRES
Sample
T
T
T
T
Sym.
ADIF
AD
CNV
ACQ
GO
These parameters are characterized but not tested.
only and are not tested.
ADRESH and ADRESL registers may be read on the following T
See Table 9-1 for minimum conditions.
GO
Q4
SLEEP instruction to be executed.
134
A/D Clock Period
A/D Internal RC
Oscillator Period
Conversion Time
(not including
Acquisition Time)
Acquisition Time
Q4 to A/D Clock
Start
Characteristic
132
A/D CONVERSION TIMING (NORMAL MODE)
-40°C ≤ T
(T
(1)
OSC
A
≤ +125°C
/2)
(1)
Min.
3.0*
3.0*
2.0*
1.5
(2)
9
5*
OLD_DATA
8
T
Typ†
OSC
11.5
6.0
4.0
11
Sampling Stopped
131
7
/2
6
CY
Max.
9.0*
6.0*
130
is added before the A/D clock starts. This allows the
3
Units
T
CY
μs
μs
μs
μs
μs
μs
AD
2
cycle.
T
T
ADCS<1:0> = 11 (RC mode)
At V
At V
Set GO bit to new data in A/D Result
register
The minimum time is the amplifier
settling time. This may be used if the
“new” input voltage has not changed
by more than 1 LSb (i.e., 4.1 mV @
4.096V) from the last sampled
voltage (as stored on C
If the A/D clock source is selected as
RC, a time of T
the A/D clock starts. This allows the
SLEEP instruction to be executed.
OSC
OSC
1
DD
DD
-based, V
-based, V
© 2008 Microchip Technology Inc.
= 2.5V
= 5.0V
0
Conditions
REF
REF
CY
NEW_DATA
is added before
DONE
1 T
≥ 2.5V
full range
CY
1 T
HOLD
CY
).

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