PIC16F689-E/ML Microchip Technology, PIC16F689-E/ML Datasheet - Page 10
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC](/photos/6/64/66481/c04-126_ml_sml.jpg)
PIC16F689-E/ML
Manufacturer Part Number
PIC16F689-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
Specifications of PIC16F689-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F631/677/685/687/689/690
EXAMPLE 3:
5.2 LP/Timer1 Oscillator Operation Below 25°C
DS80243M-page 10
Update:
1-2% of devices experience reduced drive as
temperatures approach -40°C. This will result in a
loss of Timer1 counts or stopped Timer1
oscillation.
This can also prevent Timer1 oscillator start-up
under cold conditions.
Work around
Use of low-power crystals properly matched to the
device will reduce the likelihood of failure. A 1M
resistor between OSC2 and V
improve the drive strength of the circuit.
Affected Silicon Revisions
PIC16F631/PIC16F677
PIC16F685/PIC16F687/PIC16F689/
PIC16F690
BTFSC
GOTO
BTFSS
GOTO
BCF
BSF
BCF
BSF
BCF
Critical Timing of code sequence for instructions following last write to TMR1L or TMR1H.
A1
A3
X
X
A4
X
TMR1L,0
$-1
TMR1L,0
$-1
T1CON,TMR1CS
TMR1H,7
T1CON,TMR1ON
T1CON,TMR1CS
T1CON,TMR1ON
A5
X
A6
X
;Timer has just incremented, 31 s before next rising edge to
;complete reload
;Select HFINTOSC for Timer1
;Timer1 high byte 0x80
;Timer1 off
;Select external crystal
;Timer1 on
DD
will further
5.3 LP/Timer1 Oscillator Shared Operation
When using LP oscillator as the system clock and
enabling Timer1 external oscillator, the shared
crystal will clock both the core and Timer1. On
execution of the SLEEP instruction, the oscillator
amplifier will be disabled and Timer1 will not be
clocked while the device is in Sleep.
Work around
None.
Affected Silicon Revisions
PIC16F631/PIC16F677
PIC16F685/PIC16F687/PIC16F689/
PIC16F690
A1
A3
X
X
A4
X
A5
X
2010 Microchip Technology Inc.
A6
X