PIC16F689-E/ML Microchip Technology, PIC16F689-E/ML Datasheet - Page 8
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC](/photos/6/64/66481/c04-126_ml_sml.jpg)
PIC16F689-E/ML
Manufacturer Part Number
PIC16F689-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
Specifications of PIC16F689-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F631/677/685/687/689/690
FIGURE 8-3:
FIGURE 1:
DS80243M-page 8
A4 and previous revisions
FixedRef
CV
C2V
Rev. A5 CCP Output
REF
REN
C12IN0-
C12IN1-
C2IN2-
C2IN3-
C2CH<1:0>
C2IN+
0
1
CCP Output
MUX
SILICON REVISION A4 AND PREVIOUS VS. REVISION A5
CxOUT
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
C2R
CxIF
0
1
2
3
0
1
2
MUX
MUX
Uncertainty due to
Note 1:
Q1 cycle delay
2:
3:
C2V
C2V
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
IN
IN
-
+
C2
C2ON
C2POL
Read CMxCON0
(1)
From TMR1
Q3*RD_CM2CON0
Clock
Q1
D
NRESET
C2OUT
D
EN
Uncertainty due to
Q
Q1 cycle delay
Q
C2SYNC
D
EN
C2POL
CL
0
1
MUX
Q
2010 Microchip Technology Inc.
Rev. A5: To ECCP
to Timer1 Gate, SR latch
and other peripherals
To ECCP Auto-Shutdown
Auto-Shutdown
Rev. A4 and previous:
RD_CM2CON0
OSC
Read CMxCON0
).
SYNCC2OUT
Set C2IF
Data Bus
To