PIC16F73-E/SP Microchip Technology, PIC16F73-E/SP Datasheet - Page 504
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PIC16F73-E/SP
Manufacturer Part Number
PIC16F73-E/SP
Description
28 PIN, 7KB STD FLASH, 192 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F73-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC16F73E/SP
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 504 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
27.3
27.3.1
DS31027A-page 27-8
Program Verification/Code Protection
ROM Devices
If the code protection bit(s) have not been programmed, the on-chip program memory can be
read out for verification purposes.
When a ROM device also has Data EEPROM memory, an additional code protect configuration
bit may be implemented. The program memory configuration bit is submitted as part of the ROM
code submittal. The Data EEPROM memory code protect configuration bit will be an EEPROM
bit. When ROM devices complete testing, the EEPROM data memory code protect bit will be pro-
grammed to the same state as the program memory code protect bit. That is data EEPROM code
protect is off, when program memory code protect is off, and data EEPROM code protect is on
for all other selections.
In applications where the device is code protected and the data EEPROM needs to be pro-
grammed before the application can be released, the data EEPROM memory must have the
entire data EEPROM memory erased. The device programming specification details the steps to
do this. Microchip device programmers implement the specified sequence. Once this sequence
is complete, the Data EEPROM memory code protect is disabled. This allows the desired data
to be programmed into the device. After programming the data EEPROM memory array, the data
EEPROM memory code protect configuration bit should be programmed as desired.
Note:
Microchip does not recommend code protecting windowed devices.
1997 Microchip Technology Inc.
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