PIC16F73-E/SS Microchip Technology, PIC16F73-E/SS Datasheet - Page 327

• Manufacturer Part Number: PIC16F73-E/SS
• Description: 28 PIN, 7KB STD FLASH, 192 RAM, 22 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F73-E/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SSOP
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16F73E/SS

Figure 17-35: Bus Collision During Start Condition (SDA only)
Figure 17-36: Bus Collision During Start Condition (SCL = 0)
1997 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
SDA
SCL
SEN
S
BCLIF
SSPIF
'0'
'0'
SCL = 0 before BRG time out,
Bus collision occurs, Set BCLIF.
Set SEN, enable start
sequence if SDA = 1, SCL = 1
condition if SDA = 1, SCL=1
Set SEN, enable start
SDA sampled low before
START condition.
S bit and SSPIF set because
SDA = 0, SCL = 1
. Set BCLIF,
SDA goes low before the SEN bit is set.
S bit and SSPIF set because
SDA = 0, SCL = 1
SDA = 0, SCL = 1
Set BCLIF.
T
BRG
Preliminary
T
BRG
SSPIF and BCLIF are
cleared in software.
SEN cleared automatically because of bus collision.
SSP module reset into idle state.
SCL = 0 before SDA = 0,
Bus collision occurs, Set BCLIF.
Section 17. MSSP
SSPIF and BCLIF are
cleared in software.
Interrupts cleared
in software.
'0'
'0'
DS31017A-page 17-51
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