PIC16F77-I/ML Microchip Technology, PIC16F77-I/ML Datasheet - Page 32

• Manufacturer Part Number: PIC16F77-I/ML
• Description: 44 PIN, 14KB STD FLASH, 368 RAM, 33 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F77-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F7X
3.3
A program memory location may be read by writing two
bytes of the address to the PMADR and PMADRH reg-
isters and then setting control bit RD (PMCON1<0>).
Once the read control bit is set, the microcontroller will
use the next two instruction cycles to read the data. The
data is available in the PMDATA and PMDATH regis-
ters after the second NOP instruction. Therefore, it can
be read as two bytes in the following instructions. The
PMDATA and PMDATH registers will hold this value
until the next read operation.
EXAMPLE 3-1:
TABLE 3-1:
DS30325B-page 30
Address
10Dh
10Fh
10Ch
10Eh
18Ch
Legend:
Note 1: This bit always reads as a ‘1’.
Required
Sequence
Reading the FLASH Program
Memory
x = unknown, u = unchanged, r = reserved, - = unimplemented read as '0'. Shaded cells are not used during FLASH access.
PMADR
PMADRH
PMDATA Data Register Low Byte
PMDATH
PMCON1
Name
BSF
BCF
MOVF
MOVWF
MOVF
MOVWF
BSF
BSF
NOP
NOP
BCF
MOVF
MOVF
REGISTERS ASSOCIATED WITH PROGRAM FLASH
Address Register Low Byte
FLASH PROGRAM READ
Bit 7
—
—
—
STATUS, RP1
STATUS, RP0
ADDRH, W
PMADRH
ADDRL, W
PMADR
STATUS, RP0
PMCON1, RD
STATUS, RP0
PMDATA, W
PMDATH, W
(1)
Bit 6
—
—
—
Data Register High Byte
Bit 5
—
—
;
; Bank 2
;
; MSByte of Program Address to read
;
; LSByte of Program Address to read
; Bank 3 Required
; EEPROM Read Sequence
; memory is read in the next two cycles after BSF PMCON1,RD
;
; Bank 2
; W = LSByte of Program PMDATA
; W = MSByte of Program PMDATA
Address Register High Byte
Bit 4
—
Bit 3
—
3.4
FLASH program memory has its own code protect
mechanism. External Read and Write operations by
programmers are disabled if this mechanism is
enabled.
The microcontroller can read and execute instructions
out of the internal FLASH program memory, regardless
of the state of the code protect configuration bits.
Bit 2
—
Operation During Code Protect
Bit 1
—
Bit 0
RD
 2002 Microchip Technology Inc.
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
1--- ---0 1--- ---0
Value on:
POR,
BOR
Value on
RESETS
all other