PIC16F870-E/SO Microchip Technology, PIC16F870-E/SO Datasheet - Page 56
PIC16F870-E/SO
Manufacturer Part Number
PIC16F870-E/SO
Description
28 PIN, 3.5KB ENH FLASH, 128 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F870-ISO.pdf
(172 pages)
4.PIC16F870-ISO.pdf
(6 pages)
Specifications of PIC16F870-E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB16F871 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F870-ISO PDF datasheet #3
- PIC16F870-ISO PDF datasheet #4
- Current page: 56 of 172
- Download datasheet (4Mb)
PIC16F870/871
7.1
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device RESET (POR, MCLR Reset, WDT
TMR2 is not cleared when T2CON is written.
TABLE 7-1:
DS30569B-page 54
0Bh,8Bh,
10Bh,18Bh
0Ch
8Ch
11h
12h
92h
Legend:
Note 1:
Address
Reset, or BOR)
Timer2 Prescaler and Postscaler
INTCON
PIR1
PIE1
TMR2
T2CON
PR2
x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Timer2 module.
Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear.
Name
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
PSPIF
PSPIE
Timer2 Module’s Register
Timer2 Period Register
Bit 7
GIE
—
(1)
(1)
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
ADIE
Bit 6
PEIE
ADIF
RCIE
RCIF
Bit 5
T0IE
Bit 4
INTE
TXIF
TXIE
RBIE
Bit 3
—
—
7.2
The output of TMR2 (before the postscaler) is fed to the
SSP module, which optionally uses it to generate shift
clock.
CCP1IF
CCP1IE
Bit 2
T0IF
Output of TMR2
TMR2IE
TMR2IF
Bit 1
INTF
2003 Microchip Technology Inc.
TMR1IE 0000 -000 0000 -000
TMR1IF 0000 -000 0000 -000
Bit 0
RBIF
0000 000x 0000 000u
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOR
Value on:
Value on
RESETS
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