PIC16F873-04E/SO Microchip Technology, PIC16F873-04E/SO Datasheet - Page 78
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PIC16F873-04E/SO
Manufacturer Part Number
PIC16F873-04E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873-04SO.pdf
(218 pages)
4.PIC16F873-04SO.pdf
(5 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(4 pages)
Specifications of PIC16F873-04E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F87304E/SO
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F873-04SO PDF datasheet #3
- PIC16F873-04SO PDF datasheet #4
- PIC16F873-04SO PDF datasheet #5
- PIC16F873-04SO PDF datasheet #6
- Current page: 78 of 218
- Download datasheet (4Mb)
PIC16F87X
FIGURE 9-7:
9.2.2
The addressing procedure for the I
the first byte after the START condition usually deter-
mines which device will be the slave addressed by the
master. The exception is the general call address, which
can address all devices. When this address is used, all
devices should, in theory, respond with an acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all 0’s with R/W = 0.
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is enabled (SSPCON2<7>
is set). Following a START bit detect, 8 bits are shifted
into SSPSR and the address is compared against
SSPADD. It is also compared to the general call
address and fixed in hardware.
FIGURE 9-8:
DS30292C-page 76
SDA
SCL
SSPIF
BF (SSPSTAT<0>)
CKP (SSPCON<4>)
GCEN
(SSPCON2<7>)
SSPOV
(SSPCON<6>)
SDA
SCL
SSPIF
BF
(SSPSTAT<0>)
S
GENERAL CALL ADDRESS
SUPPORT
A7
1
Data in
sampled
S
A6
2
I
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE (7 OR 10-BIT MODE)
2
C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
A5
Receiving Address
3
1
A4
4
2
General Call Address
A3
2
5
C bus is such that
3
A2
6
2
C protocol. It
4
A1
7
5
R/W = 1
8
6
9
ACK
responds to SSPIF
7
SCL held low
while CPU
R/W = 0
8
If the general call address matches, the SSPSR is
transferred to the SSPBUF, the BF flag is set (eighth
bit), and on the falling edge of the ninth bit (ACK bit),
the SSPIF flag is set.
When the interrupt is serviced, the source for the inter-
rupt can be checked by reading the contents of the
SSPBUF to determine if the address was device spe-
cific, or a general call address.
In 10-bit mode, the SSPADD is required to be updated
for the second half of the address to match, and the UA
bit is set (SSPSTAT<1>). If the general call address is
sampled when GCEN is set, while the slave is config-
ured in 10-bit address mode, then the second half of
the address is not necessary, the UA bit will not be set,
and the slave will begin receiving data after the
Acknowledge (Figure 9-8).
ACK
Address is compared to General Call Address
after ACK, set interrupt flag
9
D7
D7
1
1
SSPBUF is written in software
D6
D6
Cleared in software
2
2
Cleared in software
SSPBUF is read
Set bit after writing to SSPBUF
(the SSPBUF must be written to,
before the CKP bit can be set)
D5
3
Receiving data
D5
3
D4
4
D4
4
Transmitting Data
D3
5
D3
5
2001 Microchip Technology Inc.
D2
6
D2
6
From SSP Interrupt
Service Routine
D1
7
D1
7
D0
8
D0
8
Not ACK
R/W = 0
9
ACK
9
’0’
’1’
P
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