PIC16F873-04E/SO Microchip Technology, PIC16F873-04E/SO Datasheet - Page 79
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PIC16F873-04E/SO
Manufacturer Part Number
PIC16F873-04E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873-04SO.pdf
(218 pages)
4.PIC16F873-04SO.pdf
(5 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(4 pages)
Specifications of PIC16F873-04E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F87304E/SO
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F873-04SO PDF datasheet #3
- PIC16F873-04SO PDF datasheet #4
- PIC16F873-04SO PDF datasheet #5
- PIC16F873-04SO PDF datasheet #6
- Current page: 79 of 218
- Download datasheet (4Mb)
9.2.3
While in SLEEP mode, the I
addresses or data. When an address match or com-
plete byte transfer occurs, wake the processor from
SLEEP (if the SSP interrupt is enabled).
TABLE 9-3:
0Bh, 8Bh,
10Bh,18Bh
0Ch
8Ch
0Dh
8Dh
13h
14h
91h
93h
94h
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the SSP in I
Note 1: These bits are reserved on PIC16F873/876 devices; always maintain these bits clear.
Address
2001 Microchip Technology Inc.
2: These bits are reserved on these devices; always maintain these bits clear.
SLEEP OPERATION
INTCON
PIR1
PIE1
PIR2
PIE2
SSPBUF
SSPCON
SSPCON2
SSPADD
SSPSTAT
Name
REGISTERS ASSOCIATED WITH I
Synchronous Serial Port Receive Buffer/Transmit Register
I
PSPIF
PSPIE
2
WCOL
GCEN
C Slave Address/Master Baud Rate Register
Bit 7
SMP
GIE
—
—
(1)
(1)
2
C module can receive
ACKSTAT
SSPOV
PEIE
ADIF
ADIE
Bit 6
CKE
(2)
(2)
SSPEN
ACKDT
RCIF
RCIE
Bit 5
T0IE
D/A
—
—
ACKEN
INTE
TXIE
EEIF
EEIE
Bit 4
TXIF
CKP
P
2
C OPERATION
SSPM3 SSPM2
SSPIF
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
BCLIE
RCEN
BCLIF
9.2.4
A RESET disables the SSP module and terminates the
current transfer.
RBIE
Bit 3
S
CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
Bit 2
T0IF
PEN
R/W
—
—
EFFECTS OF A RESET
SSPM1
RSEN
Bit 1
INTF
UA
—
—
CCP2IF -r-0 0--0 -r-0 0--0
CCP2IE -r-0 0--0 -r-0 0--0
SSPM0 0000 0000 0000 0000
PIC16F87X
RBIF
Bit 0
SEN
BF
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
POR, BOR
Value on:
DS30292C-page 77
2
C mode.
Value on:
MCLR,
WDT
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