PIC16F887-E/ML Microchip Technology, PIC16F887-E/ML Datasheet - Page 86
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F887-E/ML
Manufacturer Part Number
PIC16F887-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
Specifications of PIC16F887-E/ML
Rohs Compliant
YES
Mfg Application Notes
Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- MCP1631RD-MCC2 PDF datasheet #2
- PIC16F882-ISS PDF datasheet #3
- PIC16F882-ISS PDF datasheet #4
- Current page: 86 of 328
- Download datasheet (6Mb)
PIC16F882/883/884/886/887
FIGURE 8-2:
FIGURE 8-3:
DS41291F-page 84
FixedRef
CV
C1R
FixedRef
CV
C2R
REF
REF
SEL
SEL
C12IN0-
C12IN1-
C12IN2-
C12IN3-
C2IN+
C12IN0-
C12IN1-
C12IN2-
C12IN3-
C1IN+
C2CH<1:0>
C1CH<1:0>
0
1
0
1
MUX
Note 1:
MUX
Note 1:
COMPARATOR C1 SIMPLIFIED BLOCK DIAGRAM
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
C1V
C1R
2:
3:
C2V
C2R
2:
3:
0
1
2
3
0
1
2
3
0
1
REF
2
MUX
0
1
REF
MUX
2
MUX
When C1ON = 0, the C1 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
MUX
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
C2V
C2V
C1V
C1V
IN
IN
+
IN
IN
-
-
+
C2
C2ON
+
-
C1
C1ON
C2POL
(1)
C1POL
(1)
From Timer1
Q3*RD_CM2CON0
Clock
Q3*RD_CM1CON0
Q1
Q1
D
C2OUT
D
EN
Reset
D
EN
C1OUT
Reset
Q
Q
C2SYNC
Q
D
EN
C2POL
D
EN
CL
OSC
0
1
C1POL
OSC
MUX
CL
Q
Q
).
).
© 2009 Microchip Technology Inc.
To Timer1 Gate, SR Latch,
PWM Logic, and other
peripherals
RD_CM2CON0
RD_CM1CON0
C1OUT (to SR Latch)
To PWM Logic
SYNCC2OUT
Data Bus
Set C2IF
Data Bus
Set C1IF
To
To
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