PIC16F916-E/SP Microchip Technology, PIC16F916-E/SP Datasheet
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PIC16F916-E/SP
Specifications of PIC16F916-E/SP
Related parts for PIC16F916-E/SP
PIC16F916-E/SP Summary of contents
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... PIC16F91X/946 Memory Programming Specification This document includes the programming specifications for the following devices: • PIC16F913 • PIC16F914 • PIC16F946 • PIC16F916 • PIC16F917 1.0 PROGRAMMING THE PIC16F91X/946 DEVICES The PIC16F91X/946 devices are programmed using a serial method. The Serial mode will allow the PIC16F91X/ 946 to be programmed while in the user’ ...
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... FIGURE 1-2: PIC16F913/916 28-PIN QFN RA2/AN2/C2+/COM2/V REF RA3/AN3/C1+/COM3/V +/SEG15 REF RA4/T0CKI/C1OUT/SEG4 RA5/AN4/SS/C2OUT/SEG5 V SS OSC1/CLKI/T1OSI/RA7 OSC2/CLKO/T1OSO/RA6 DS41244F-page PIC16F913/916 RB7/ICSPDAT/ICDDAT/SEG13 RB6/ICSPCLK/ICDCK/SEG14 RB5/COM1 RB4/COM0 RB3/SEG3 RB2/SEG2 RB1/SEG1 RB0/INT/SEG0 RC7/RX/DT/SDI/SDA/SEG8 RC6/TX/CK/SCK/SCL/SEG9 RC5/T1CKI/CCP1/SEG10 RC4/T1G/SDO/SEG11 RB3/SEG3 RB2/SEG2 RB1/SEG1 RB0/INT/SEG0 RC7/RX/DT/SDI/SDA/SEG8 © 2009 Microchip Technology Inc. ...
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... FIGURE 1-3: PIC16F914/917 44-PIN DIAGRAM TQFP, QFN 44-pin TQFP RC7/SDA/SDI/DT/RX/SEG8 1 RD4/SEG17 2 RD5/SEG18 3 RD6/SEG19 4 RD7/SEG20 RB0/INT/SEG0 8 RB1/SEG1 9 RB2/SEG2 10 RB3/SEG3 11 44-pin QFN RC7/SDA/SDI/DT/RX/SEG8 © 2009 Microchip Technology Inc RC0/VLCD1 32 OSC2/CLKO/T1OSO/RA6 31 OSC1/CLKI/T1OSI/RA7 PIC16F914/917 RE2/AN7/SEG23 27 RE1/AN6/SEG22 26 RE0/AN5/SEG21 25 RA5/AN4/C2OUT/SS/SEG5 24 23 RA4/C1OUT/T0CKI/SEG4 1 RD4/SEG17 2 RD5/SEG18 3 RD6/SEG19 4 RD7/SEG20 5 PIC16F914/917 ...
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... DS41244F-page 4 40 RB7/ICSPDAT/ICDDAT/SEG13 1 39 RB6/ICSPCLK/ICDCK/SEG14 2 38 RB5/COM1 3 37 RB4/COM0 4 36 RB3/SEG3 5 35 RB2/SEG2 6 34 RB1/SEG1 7 33 RB0/INT/SEG0 RD7/SEG20 11 29 RD6/SEG19 12 28 RD5/SEG18 13 27 RD4/SEG17 14 26 RC7/RX/DT/SDI/SDA/SEG8 15 25 RC6/TX/CK/SCK/SCL/SEG9 16 24 RC5/T1CKI/CCP1/SEG10 17 23 RC4/T1G/SDO/SEG11 18 22 RD3/SEG16 19 21 RD2/CCP2 20 © 2009 Microchip Technology Inc. ...
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... FIGURE 1-5: PIC16F946 64-PIN TQFP TQFP RD6/SEG19 1 RD7/SEG20 2 RG0/SEG36 3 RG1/SEG37 4 5 RG2/SEG38 RG3/SEG39 6 RG4/SEG40 7 RG5/SEG41 RF0/SEG32 11 RF1/SEG33 12 RF2/SEG34 13 RF3/SEG35 14 RB0/INT/SEG0 15 RB1/SEG1 © 2009 Microchip Technology Inc. PIC16F91X/946 PIC16F946 RF7/SEG31 47 RF6/SEG30 46 RF5/SEG29 45 RF4/SEG28 44 RE7/SEG27 43 RE6/SEG26 42 RE5/SEG25 RA6/OSC2/CLKO/T1OSO 39 RA7/OSC1/CLKI/T1OSI RE4/SEG24 36 MCLR/V /RE3 PP RE2/AN7/SEG23 ...
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... Program Memory Map The user memory space extends from 0x0000-0x0FFF for PIC16F913/914 and from 0x0000-0x1FFF for PIC16F916/917/946. In Program/Verify mode, the program memory space extends from 0x0000 to 0x3FFF, with the first half being user program memory and the second half (0x2000-0x3FFF) being configuration memory ...
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... User ID Location 2003 Reserved 2004 Reserved 2005 Device ID 2006 Configuration Word 2007 2008 Calibration Word 1 2009 Calibration Word 2 200A-203F Reserved © 2009 Microchip Technology Inc. PIC16F91X/946 4 KW Implemented 0FFF Program Memory Maps to 0-FFF 1FFF 2000 Implemented 2040 Maps to Configuration Memory 2000-203F 3FFF ...
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... PIC16F91X/946 FIGURE 2-2: PIC16F916/917/946 PROGRAM MEMORY MAPPING User ID Location 2000 User ID Location 2001 User ID Location 2002 User ID Location 2003 Reserved 2004 Reserved 2005 Device ID 2006 Configuration Word 2007 2008 Calibration Word 1 2009 Calibration Word 2 Reserved 200A-203F FIGURE 2-3: PIC16F91X/946 DATA MEMORY MAPPING ...
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... Program Counter (PC) is cleared. To prevent a device configured with INTOSC and internal MCLR from executing after exiting Program/ Verify mode; V needs to power-down before V DD See Figure 3-3 for the timing. © 2009 Microchip Technology Inc. FIGURE 3- and data. This ...
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... The Increment Address command will increment the PC. The Load Configuration command will set the PC to 0x2000. The available commands are shown in Table 3-1. 3.1.1 EIGHT-WORD PROGRAMMING Only the program memory on PIC16F916/917/946 can be written using this algorithm. Data and configuration memory (>0x2000) must use programming algorithm (Section 3.1.3 “ ...
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... Issue a Increment Address command. 3. Repeat this sequence three PIC16F913/914 and seven times on PIC16F916/ 917/946 to reset all write latches. © 2009 Microchip Technology Inc. 3.1.5 ERASE ALGORITHMS The PIC16F91X/946 will erase different memory locations depending on the Program Counter (PC), CP and CPD values, and which erase command is executed ...
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... DLY specified between consecutive for the End Programming . DIS 1 is required between a DLY Data 0, data (14 data (14 data (8), zero (6 data (14 data (8), zero (6 Internally Timed 0 0 Externally Timed Internally Timed 0 1 Internally Timed 1 1 Internally Timed 0 1 © 2009 Microchip Technology Inc. 1 ...
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... SET T 1 HLD © 2009 Microchip Technology Inc. After the 6-bit command is input, the ICSPCLK pin is cycled an additional 16 times for the Start bit, 14 bits of data and a Stop bit. See Figure 3-4 for more details. After the configuration memory is entered, the only way ...
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... FIGURE 3-7: READ DATA FROM PROGRAM MEMORY COMMAND ICSPCLK ICSPDAT T 1 SET T HLD Input DS41244F-page DLY strt_bit LSb T 1 DLY T 2 DLY strt_bit LSb DLY DLY stp_bit MSb on 9th falling edge DLY stp_bit MSb Output Input © 2009 Microchip Technology Inc. ...
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... The PC is incremented when this command is received. A timing diagram of this command is shown in Figure 3- not possible to decrement the address counter. To reset this counter, the user should exit and re-enter Program/Verify mode. FIGURE 3-9: INCREMENT ADDRESS COMMAND (PROGRAM/VERIFY) 1 ICSPCLK 0 ICSPDAT © 2009 Microchip Technology Inc DLY DLY ...
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... Programming command. The addressed location is not erased before programming. FIGURE 3-11: BEGIN PROGRAMMING COMMAND (EXTERNALLY TIMED) V IHH MCLR 1 ICSPCLK 0 ICSPDAT DS41244F-page SET T 1 HLD of the requires T PROG SET T 1 HLD 1 PROG Next Command End Programming Command © 2009 Microchip Technology Inc. ...
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... Configuration Word is programmed (clear). See Section 3.1.5 “Erase Algorithms” sequences. Note: All Bulk Erase operations must take place between 4.5V and 5. FIGURE 3-13: BULK ERASE PROGRAM MEMORY COMMAND 1 ICSPCLK 1 ICSPDAT T 1 SET © 2009 Microchip Technology Inc SET T 1 HLD for erase ...
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... To perform a Row Erase Program Memory, the following sequence must be performed: 1. Execute a Row Erase Program Memory command. 2. Wait T to complete a row erase. ERA FIGURE 3-15: ROW ERASE PROGRAM MEMORY COMMAND 1 ICSPCLK 1 ICSPDAT DS41244F-page SET T 1 HLD ERA Next Command ERA Next Command © 2009 Microchip Technology Inc. ...
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... Note 1: This step is optional if device has already been erased or has not been previously programmed. 2: This step is optional if the data memory does not require updates the device is code-protected or must be completely erased, then Bulk Erase device per Figure 3-21. © 2009 Microchip Technology Inc. PIC16F91X/946 Begin ...
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... Increment Address Command Load Data for Program Memory Increment Address Command Load Data for Program Memory Begin Begin Programming Programming Command Command (Internally timed) (Externally timed) Wait T 2 Wait T 1 PROG PROG End Programming Wait T DIS © 2009 Microchip Technology Inc. ...
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... Verification in Eight-word mode is accomplished after programming by reading back the entire memory. 3: This step is optional if the data memory does not require updates the device is code-protected or must be completely erased, then Bulk Erase device per Figure 3-21. © 2009 Microchip Technology Inc. PIC16F91X/946 Program Cycle Load Data Latch 1 ...
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... Address Command Increment Address Command One-word Program Cycle (Config. bits) Read Data From Program Memory Command Report No Programming Data Correct? Failure Yes Done for Begin Programming Command (Externally timed) Wait T 2 PROG End Programming Wait T DIS © 2009 Microchip Technology Inc. ...
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... Bulk Erase Data Memory Program Cycle Read Data From Data Memory Command Data Correct? Increment No All Locations Address Done? Command Done © 2009 Microchip Technology Inc. Programming (Internally timed) Wait T Report No Programming Failure Yes Yes PIC16F91X/946 Program Cycle Load Data for ...
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... PROGRAM FLOWCHART – ERASE FLASH DEVICE DS41244F-page 24 Start Read and Store Calibration Memory Values (Figure 3-22) Bulk Erase Program Memory Load Configuration Bulk Erase Program Memory Bulk Erase Data Memory Read and Verify Calibration Memory Values (Figure 3-22) Done © 2009 Microchip Technology Inc. ...
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... This step is not required for the Read and Store Calibration Memory Values procedure. 2: The device should not be used if verification of the Calibration Word locations fails. This information should be reported to the user through the user interface of the device programmer. © 2009 Microchip Technology Inc. PIC16F91X/946 Start Load Configuration ...
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... R/P-1 R/P-1 R/P-1 FCMEN IESO BOREN1 R/P-1 R/P-1 R/P-1 PWRTE WDTE FOSC2 P = Programmable ‘0’ = Bit is cleared (1) (2) (4) DD R/P-1 R/P-1 BOREN0 CPD bit 7 R/P-1 R/P-1 FOSC1 FOSC0 bit Unimplemented bit, read as ‘1’ Bit is unknown © 2009 Microchip Technology Inc. ...
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... This location does not participate in Bulk Erase operations if the procedure in Figure 3-21 is used. 2: Calibration bits are reserved for factory calibration. These values can and will change across the entire range, therefore, specific values and available adjustment range can not be specified. © 2009 Microchip Technology Inc. R/P-1 R/P-1 R/P-1 ...
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... Device ID Word The device ID word for the PIC16F91X/946 is located at 2006h. This location can not be erased. TABLE 4-1: DEVICE ID VALUES Device ID Values Device Dev PIC16F917 01 0011 1000 PIC16F916 01 0011 1010 PIC16F914 01 0011 1100 PIC16F913 01 0011 1110 PIC16F946 01 0100 0110 DS41244F-page 28 U-1 U-1 U-1 — ...
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... Specifically for the PIC16F91X/946, the data memory should also be embedded in the hex file (see Section 5.3.2 “Embedding Data Memory Contents In Hex File”). Microchip Technology Incorporated feels strongly that this feature is important for the benefit of the end customer. © 2009 Microchip Technology Inc. ...
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... PIC16F913 OFF SUM[0x0000:0x0FFF] + (CFGW & 1FFF) ON (CFGW and 0x1FFF) + SUM_ID PIC16F914 OFF SUM[0x0000:0x0FFF] + (CFGW & 1FFF) ON (CFGW and 0x1FFF) + SUM_ID PIC16F916 OFF SUM[0x0000:0x1FFF] + (CFGW & 1FFF) ON (CFGW and 0x1FFF) + SUM_ID PIC16F917 OFF SUM[0x0000:0x1FFF] + (CFGW & 1FFF) ON (CFGW and 0x1FFF) + SUM_ID PIC16F946 OFF SUM[0x0000:0x1FFF] + (CFGW & ...
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... PROG timed) Programming cycle time (externally T 2 PROG timed) Time delay from program to compare T DIS (HV discharge time) © 2009 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) -40°C ≤ T Operating Temperature 4.5V ≤ V Operating Voltage Min. Typ. Max. General 2.0 — ...
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... Rev E Document (4/2006) Updated T 1 and T 2 timings. PROG PROG Rev F Document (10/2009) Updated sections 2.3, 3.1.4, 3.1.5; Updated the Note in section 3.1.3; Updated Figures 3-16, 3-17, 3-18, 3-19, 3-21; Added Figure 3-22; Other minor corrections. DS41244F-page 32 © 2009 Microchip Technology Inc. ...
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... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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