PIC16F916-E/SP Microchip Technology, PIC16F916-E/SP Datasheet - Page 9
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PIC16F916-E/SP
Manufacturer Part Number
PIC16F916-E/SP
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F913-ISS.pdf
(330 pages)
3.PIC16F913-ISS.pdf
(8 pages)
4.PIC16F913-ISS.pdf
(34 pages)
Specifications of PIC16F916-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
352 B
Interface Type
SSP, I2C, AUSART, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.0
Two methods are available to enter Program/Verify
mode. The “V
and ICSPCLK low while raising MCLR pin from V
V
method can be used for any Configuration Word
selection and must be used if the INTOSC and internal
MCLR options are selected (FOSC<2:0> = 100 or 101
and MCLRE = 0). The V
device from executing code prior to entering Program/
Verify mode. See the timing diagram in Figure 3-1.
The second entry method, “V
applying V
then raising MCLR pin from V
followed by data. This technique is useful when
programming the device when V
for it is not necessary to disconnect V
Program/Verify mode. See the timing diagram in
Figure 3-2.
Once in this mode, the program memory, data memory,
and configuration memory can be accessed and
programmed in serial fashion. ICSPDAT and ICSPCLK
are Schmitt Trigger inputs in this mode. RB6 is tri-state,
regardless of fuse setting.
The sequence that enters the device into the
Programming/Verify mode places all other logic into the
Reset state (the MCLR pin was initially at V
Therefore, all I/Os are in the Reset state (high-
impedance inputs) and the Program Counter (PC) is
cleared.
To prevent a device configured with INTOSC and
internal MCLR from executing after exiting Program/
Verify mode; V
See Figure 3-3 for the timing.
© 2009 Microchip Technology Inc.
IHH
(high voltage), then applying V
PROGRAM/VERIFY MODE
DD
, holding ICSPDAT and ICSPCLK low,
PP
DD
-first” is entered by holding ICSPDAT
needs to power-down before V
PP
-first entry prevents the
IL
DD
to V
DD
-first”, is entered by
is already applied,
IHH
DD
and data. This
(high voltage),
DD
to enter
IL
PP
IL
to
).
.
FIGURE 3-1:
FIGURE 3-2:
FIGURE 3-3:
ICSPCLK
ICSPCLK
ICSPCLK
ICSPDAT
ICSPDAT
ICSPDAT
Note:
Note:
V
V
V
V
V
V
DD
DD
DD
PP
PP
PP
This method of entry is valid, regardless
of Configuration Word selected.
PIC16F91X/946
This method of entry is valid, regardless
of Configuration Word selected.
T
T
PPDP
HLD
VPP-FIRST PROGRAM/
VERIFY MODE ENTRY
VDD-FIRST PROGRAM/
VERIFY MODE ENTRY
PROGRAM/VERIFY MODE
EXIT
T
0
HLD
0
T
T
HLD
PPDP
0
DS41244F-page 9