PIC18F1230-I/SS Microchip Technology, PIC18F1230-I/SS Datasheet
PIC18F1230-I/SS
Specifications of PIC18F1230-I/SS
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PIC18F1230-I/SS Summary of contents
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... Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS39758C), the following clarifications and corrections should be noted. Any silicon issues related to the PIC18F1230/1330 will be reported in a separate silicon errata. Please check the Microchip web site for any existing issues. 1. Module: Oscillator Configurations – PLL The second paragraph of Section 2.6.4 “ ...
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... PIC18F1230/1330 3. Module: Enhanced Universal Synchronous Receiver Transmitter (EUSART) The BAUDCON register is changed to add one bit and rename another: • Added bit – Bit 5, previously unimplemented, is now RXDTP • Renamed bit – Bit 4, previously SCKP, is now TXCKP REGISTER 14-3: BAUDCON: BAUD RATE CONTROL REGISTER ...
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... End the mismatch condition by doing either of the following: - Reading or writing to CMCON - Returning the input to its original state b) Clear flag bit CMPxIF © 2008 Microchip Technology Inc. PIC18F1230/1330 R/W-0 R/W-0 R/W-0 VCFG0 PCFG3 PCFG2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared ...
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... PIC18F1230/1330 The equations used to calculate the output of the comparator voltage reference are as follows: If CVRR = ((CVR3:CVR0)/24 REF RSRC If CVRR = (CV x 1/4) + (((CVR3:CVR0)/32) REF RSRC RSRC The comparator reference supply voltage can come from either the external multiplexed with RA4 and AV . The voltage source is SS selected by the CVRSS bit (CVRCON< ...
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... FIGURE 17-1: COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM CVRSS = REF AV DD CVRSS = 0 CVREN CVRR AV SS © 2008 Microchip Technology Inc. PIC18F1230/1330 8R CVR3:CVR0 Steps CVRSS = x CVREN = 0 CV REF CVREN = 1 DS80352B-page 5 ...
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... BBSIZ<1:0>: Boot Block Size Select bits For PIC18F1330 device Boot Block size Boot Block size 01 = 512W Boot Block size 00 = 256W Boot Block size For PIC18F1230 device 512W Boot Block size 10 = 512W Boot Block size 01 = 512W Boot Block size 00 = 256W Boot Block size bit 3 Unimplemented: Maintain as ‘ ...
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... REGISTER 19-13: DEVID1: DEVICE ID REGISTER 1 FOR PIC18F1230/1330 DEVICES DEV2 DEV1 DEV0 bit 7 Legend Read-only bit P = Programmable bit -n = Value when device is unprogrammed bit 7-5 DEV2:DEV0: Device ID bits 000 =PIC18F1230 001 =PIC18F1330 bit 4-0 REV4:REV0: Revision ID bits These bits are used to indicate the device revision. ...
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... PIC18F1230/1330 8. Module: Electrical Characteristics In Table 22-1, the values for the D122 and D133A parameters are changed as indicated by bold text. TABLE 22-1: MEMORY PROGRAMMING REQUIREMENTS DC CHARACTERISTICS Param Sym Characteristic No. Data EEPROM Memory D120 E Byte Endurance D D121 V V for Read/Write DRW DD D122 T Erase/Write Cycle Time ...
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... Initial release of this data sheet errata. Includes Data Sheet Clarifications 1 (Oscillator Configurations – PLL), 2 (Flash Program Memory), 3 (EUSART), 4 (A/D), 5 (Comparator), 6 (Comparator Voltage Reference), 7 (Special Features of the CPU) and 8 (Electrical Characteristics). Rev B Document (9/2008) Changes to Data Sheet Clarification 7 (Special Features of the CPU). © 2008 Microchip Technology Inc. PIC18F1230/1330 DS80352B-page 9 ...
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... PIC18F1230/1330 NOTES: DS80352B-page 10 © 2008 Microchip Technology Inc. ...
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... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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