PIC18F2431T-I/MM Microchip Technology, PIC18F2431T-I/MM Datasheet - Page 260
PIC18F2431T-I/MM
Manufacturer Part Number
PIC18F2431T-I/MM
Description
16 KB Flash, 768 RAM, 22 I/O 28 QFN-S 6x6m T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18F2431T-I/MM
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2431T-I/MM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- Current page: 260 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
22.4
The internal reference voltage of the LVD module,
specified in electrical specification Parameter D420,
may be used by other internal circuitry, such as the
Programmable Brown-out Reset. If the LVD, or other
circuits using the voltage reference, are disabled to
lower the device’s current consumption, the reference
voltage circuit will require time to become stable before
a low-voltage condition can be reliably detected. This
FIGURE 22-2:
DS39616D-page 260
Internally Generated
Internally Generated
Reference Stable
Reference Stable
CASE 1:
CASE 2:
LVD Start-up Time
Enable LVD
Enable LVD
LVDIF
LVDIF
V
V
DD
DD
LOW-VOLTAGE DETECT WAVEFORMS
T
T
IRVST
IRVST
LVDIF may not be set
start-up time, T
of device clock speed. It is specified in electrical
specification Parameter 36.
The LVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval (refer to
LVDIF cleared in software,
LVDIF remains set since LVD condition still exists
IRVST
LVDIF cleared in software
, is an interval that is independent
2010 Microchip Technology Inc.
LVDIF cleared in software
V
V
LVD
LVD
Figure
IRVST
22-2).
has
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