PIC18F2431T-I/MM Microchip Technology, PIC18F2431T-I/MM Datasheet - Page 53
PIC18F2431T-I/MM
Manufacturer Part Number
PIC18F2431T-I/MM
Description
16 KB Flash, 768 RAM, 22 I/O 28 QFN-S 6x6m T/R
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18F2431T-I/MM
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2431T-I/MM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- Current page: 53 of 392
- Download datasheet (4Mb)
FIGURE 5-7:
TABLE 5-2:
2010 Microchip Technology Inc.
Power-on Reset
RESET Instruction
Brown-out
MCLR Reset during power-managed
Run modes
MCLR Reset during power-managed Idle
and Sleep modes
WDT Time-out during full power or
power-managed Run modes
MCLR Reset during full-power execution
Stack Full Reset (STVREN = 1)
Stack Underflow Reset (STVREN = 1)
Stack Underflow Error (not an actual
Reset, STVREN = 0)
WDT time-out during power-managed Idle
or Sleep modes
Interrupt exit from power-managed modes
Legend:
Note 1:
Note:
INTERNAL RESET
PWRT TIME-OUT
INTERNAL POR
OST TIME-OUT
PLL TIME-OUT
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’.
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0x000008h or 0x000018h).
T
T
OST
PLL
MCLR
Condition
2 ms max. First three stages of the PWRT timer.
V
= 1024 clock cycles.
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
DD
TIME-OUT SEQUENCE ON POR w/PLL ENABLED (MCLR TIED TO V
Program
PC + 2
Counter
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
PIC18F2331/2431/4331/4431
(1)
T
PWRT
0--1 1100
0--0 uuuu
0--1 11u-
0--u 1uuu
0--u 10uu
0--u 0uuu
0--u uuuu
u--u uuuu
u--u 00uu
u--u u0uu
Register
RCON
T
OST
RI
1
0
1
u
u
u
u
u
u
u
TO
1
u
1
1
1
0
u
u
0
u
T
PLL
PD
1
u
1
u
0
u
u
u
0
0
POR
0
u
u
u
u
u
u
u
u
u
BOR STKFUL STKUNF
0
u
0
u
u
u
u
u
u
u
DS39616D-page 53
DD
0
u
u
u
u
u
u
1
u
u
u
u
)
0
u
u
u
u
u
u
u
1
1
u
u
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