PIC18F4455-I/ML Microchip Technology, PIC18F4455-I/ML Datasheet - Page 2
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4455-I/ML
Manufacturer Part Number
PIC18F4455-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XR1.pdf
(438 pages)
3.PIC18F2221-ISO.pdf
(46 pages)
4.PIC18F2455-ISO.pdf
(14 pages)
5.PIC18F2455-ISO.pdf
(8 pages)
6.PIC18F2455-ISO.pdf
(26 pages)
Specifications of PIC18F4455-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
24KB (12K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Details
PIC18F2455/2550/4455/4550
TABLE 2:
DS80478A-page 2
EUSART
Timer1/3
MSSP
Interrupts
ECCP
ECCP
ECCP
ADC
BOR
USB
PORTD
MSSP
EUSART
USB
MSSP
MSSP
MSSP
MSSP
EUSART
EUSART
EUSART
EUSART
Timer1/3
Reset
ECCP
MSSP
MSSP
EUSART
ADC
Note 1:
Module
Only those issues indicated in the last column apply to the current silicon revision.
Nine-Bit
mode
Sixteen-Bit
mode
Slave
Transmit
Two-Cycle
Instructions
ECCPASE
Bit
Auto-Restart
Special Event
Trigger
Offset Error
V
SIE IN
Endpoint
RDPU
Control Bit
Slave
Addressing
BAUDCON
Register
Ping-Pong
Buffer
SPI Slave
mode
SPI mode
I
SPI mode
Async mode
Async mode
Receive
Buffer
Auto
Wake-up
16-Bit Async
RAM
PWM mode
SPI Master
mode
I
Auto-Baud
2 T
Clock
2
2
BOR
C™ mode
C mode
Feature
OSC
SILICON ISSUE SUMMARY
or RC
Number
Item
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
1.
2.
3.
4.
5.
6.
7.
8.
9.
Back-to-back timing transmit corruption
Write to TMR1H/3H may lengthen duration
Slave transmit, 10 T
Special considerations for interrupt context save
Do not use bit-wise operations on ECCPASE
Immediate restart upon shutdown source
removal
Compare mode, Special Event Trigger not like
PIC18F452
Offset greater than data sheet
‘11’ setting below minimum operating voltage
PKTDIS set, NAK, four extra bytes sent
Access to PORTE causes RDPU to clear
I
RXDTP, TXCKP do not exist
Ping-Pong mode ‘11’ not supported
SPI slave write collision
SPI SDO output may change
I
In SPI mode, do not poll BF bit
Extra zero bytes in Async mode
Data corruption in 9-bit Async full-duplex
RCREG not valid for subsequent reads
WUE bit not clearing promptly
16-Bit Async mode, TMR1H/3H not updated
Asynch Reset can alter RAM
Dead-band delay incorrect
SPI master, write collision for F
Timer2/2
Unaddressed I
Auto-baud sometimes does not work
E
2
2
IL
C™ slave address masking not implemented
C pins may not initialize properly
, E
DL
, not meeting data sheet at 511/512
2
Issue Summary
C slave node may respond
CY
not blocked
OSC
/64 and
© 2009 Microchip Technology Inc.
A3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Affected Revisions
B4
X
X
X
B5
X
X
X
B6
X
X
(1)
B7
X
X