PIC18F4680-E/PT Microchip Technology, PIC18F4680-E/PT Datasheet - Page 17
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PIC18F4680-E/PT
Manufacturer Part Number
PIC18F4680-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18F4680-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4680-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
3.2
Programming code memory is accomplished by first
loading data into the write buffer and then initiating a
programming sequence. The write and erase buffer
sizes, shown in
location of the same size, beginning at 000000h. The
actual memory write sequence takes the contents of
this buffer and programs the proper amount of code
memory that contains the Table Pointer.
The programming duration is externally timed and is
controlled by PGC. After a Start Programming
command is issued (4-bit command, ‘1111’), a NOP is
issued, where the 4th PGC is held high for the duration
of the programming time, P9.
TABLE 3-4:
TABLE 3-5:
2010 Microchip Technology Inc.
Step 1: Direct access to code memory and enable writes.
Step 2: Load write buffer.
Step 3: Repeat for all but the last two bytes.
Step 4: Load write buffer for last two bytes.
To continue writing data, repeat Steps 2 through 4, where the Address Pointer is incremented by 2 at each iteration of the loop.
PIC18F2221, PIC18F2321, PIC18F4221, PIC18F4321
PIC18F2450, PIC18F4450
PIC18F2410, PIC18F2510, PIC18F4410, PIC18F4510
PIC18F2420, PIC18F2520, PIC18F4420, PIC18F4520
PIC18F2423, PIC18F2523, PIC18F4423, PIC18F4523
PIC18F2480, PIC18F2580, PIC18F4480, PIC18F4580
PIC18F2455, PIC18F2550, PIC18F4455, PIC18F4550
PIC18F2458, PIC18F2553, PIC18F4458, PIC18F4553
PIC18F2515, PIC18F2610, PIC18F4515, PIC18F4610
PIC18F2525, PIC18F2620, PIC18F4525, PIC18F4620
PIC18F2585, PIC18F2680, PIC18F4585, PIC18F4680
PIC18F2682, PIC18F2685, PIC18F4682, PIC18F4685
Command
0000
0000
0000
0000
0000
0000
0000
0000
1101
1111
0000
4-Bit
Code Memory Programming
Devices (Arranged by Family)
8E A6
9C A6
0E <Addr[21:16]>
6E F8
0E <Addr[15:8]>
6E F7
0E <Addr[7:0]>
6E F6
<MSB><LSB>
<MSB><LSB>
00 00
Table
WRITE AND ERASE BUFFER SIZES
WRITE CODE MEMORY CODE SEQUENCE
Data Payload
3-4, can be mapped to any
BSF
BCF
MOVLW <Addr[21:16]>
MOVWF TBLPTRU
MOVLW <Addr[15:8]>
MOVWF TBLPTRH
MOVLW <Addr[7:0]>
MOVWF TBLPTRL
Write 2 bytes and post-increment address by 2.
Write 2 bytes and start programming.
NOP - hold PGC high for time P9 and low for time P10.
EECON1, EEPGD
EECON1, CFGS
PIC18F2XXX/4XXX FAMILY
Write Buffer Size (Bytes)
After PGC is brought low, the programming sequence
is terminated. PGC must be held low for the time
specified by Parameter P10 to allow high-voltage
discharge of the memory array.
The code sequence to program a PIC18F2XXX/4XXX
family device is shown in
shown in
completely write a PIC18F2XXX/4XXX family device.
The timing diagram that details the Start Programming
command and Parameters P9 and P10 is shown in
Figure
Note:
Core Instruction
3-5.
16
32
64
Figure
8
The TBLPTR register must point to the
same region when initiating the program-
ming sequence as it did when the write
buffers were loaded.
3-4, depicts the logic necessary to
Erase Buffer Size (Bytes)
Table
3-5. The flowchart,
DS39622L-page 17
64
64
64
64