PIC18F4682-I/ML Microchip Technology, PIC18F4682-I/ML Datasheet - Page 252

80KB, Flash, 3328bytes-RAM, 36I/O, 8-bit Family,nanoWatt,ECAN 44 QFN 8x8x0.9mm T

PIC18F4682-I/ML

Manufacturer Part Number
PIC18F4682-I/ML
Description
80KB, Flash, 3328bytes-RAM, 36I/O, 8-bit Family,nanoWatt,ECAN 44 QFN 8x8x0.9mm T
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4682-I/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
80KB (40K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
 Details
PIC18F2682/2685/4682/4685
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(AV
V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D converter’s internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
FIGURE 19-1:
DS39761C-page 252
REF
DD
+ and RA2/AN2/V
and AV
Note 1:
2:
SS
Converter
), or the voltage level on the RA3/AN3/
10-Bit
Channels AN5 through AN7 are not available on PIC18F2682/2685 devices.
I/O pins have diode protection to V
A/D
Reference
Voltage
A/D BLOCK DIAGRAM
REF
-/CV
REF
pins.
V
V
REF
REF
+
-
(Input Voltage)
VCFG1:VCFG0
V
AIN
DD
and V
X
X
1
0
AV
0
1
X
X
SS
DD
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input, or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is
complete, the result is loaded into the ADRESH/
ADRESL registers, the GO/DONE bit (ADCON0
register) is cleared and A/D Interrupt Flag bit, ADIF, is
set. The block diagram of the A/D module is shown in
Figure 19-1.
.
(2)
AV
SS
(2)
CHS3:CHS0
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
© 2009 Microchip Technology Inc.
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
(1)
(1)
(1)

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