PIC18F4685-E/ML Microchip Technology, PIC18F4685-E/ML Datasheet - Page 470
PIC18F4685-E/ML
Manufacturer Part Number
PIC18F4685-E/ML
Description
96KB, Flash, 3328bytes-RAM, 36I/O, 8-bit Family,nanoWatt,ECAN 44 QFN 8x8x0.9mm T
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18F4685-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
80KB (40K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4680 - BOARD DAUGHTER ICEPIC3
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4685-E/ML
Manufacturer:
MICROCHIP
Quantity:
3 000
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 470 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
Capture (CCP1 Module) ................................................... 167
Capture (ECCP1 Module) ................................................ 176
Capture/Compare/PWM (CCP1) ...................................... 165
Clock Sources .................................................................... 30
CLRF ................................................................................ 381
CLRWDT .......................................................................... 381
Code Examples
Code Protection ............................................................... 345
COMF ............................................................................... 382
DS39761C-page 470
Associated Registers ............................................... 170
CAN Message Time-Stamp ..................................... 167
CCP1 Pin Configuration ........................................... 167
CCPR1H:CCPR1L Registers ................................... 167
Prescaler .................................................................. 167
Software Interrupt .................................................... 167
Timer1/Timer3 Mode Selection ................................ 167
Capture Mode. See Capture.
CCP1 Mode and Timer Resources .......................... 166
CCPR1H or ECCPR1H Register ............................. 166
CCPR1L or ECCPR1L Register ............................... 166
Compare Mode. See Compare.
Interaction Between CCP1 and ECCP1
Module Configuration ............................................... 166
Effects of Power-Managed Modes ............................. 33
Selecting the 31 kHz Source ...................................... 31
Selection Using OSCCON Register ........................... 31
16 x 16 Signed Multiply Routine .............................. 114
16 x 16 Unsigned Multiply Routine .......................... 114
8 x 8 Signed Multiply Routine .................................. 113
8 x 8 Unsigned Multiply Routine .............................. 113
Changing Between Capture Prescalers ................... 167
Changing to Configuration Mode ............................. 280
Computed GOTO Using an Offset Value ................... 66
Data EEPROM Read ............................................... 109
Data EEPROM Refresh Routine .............................. 110
Data EEPROM Write ............................................... 109
Erasing a Flash Program Memory Row ................... 102
Fast Register Stack .................................................... 66
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock Using
Initializing PORTA .................................................... 131
Initializing PORTB .................................................... 134
Initializing PORTC .................................................... 137
Initializing PORTD .................................................... 140
Initializing PORTE .................................................... 143
Loading the SSPBUF (SSPSR) Register ................. 192
Reading a CAN Message ........................................ 296
Reading a Flash Program Memory Word ................ 101
Saving STATUS, WREG and BSR
Transmitting a CAN Message Using
Transmitting a CAN Message Using WIN Bits ......... 289
WIN and ICODE Bits Usage in Interrupt Service
Writing to Flash Program Memory ................... 104–105
for Timer Resources ........................................ 166
Indirect Addressing ............................................ 90
a Timer1 Interrupt Service ............................... 157
Registers in RAM ............................................. 130
Banked Method ................................................ 288
Routine to Access TX/RX Buffers ................... 280
Comparator ...................................................................... 259
Comparator Specifications ............................................... 433
Comparator Voltage Reference ....................................... 265
Compare (CCP1 Module) ................................................ 169
Compare (ECCP1 Module) .............................................. 176
Configuration Bits ............................................................ 345
Configuration Mode ......................................................... 327
Configuration Register
Context Saving During Interrupts ..................................... 130
Conversion Considerations .............................................. 466
CPFSEQ .......................................................................... 382
CPFSGT .......................................................................... 383
CPFSLT ........................................................................... 383
Crystal Oscillator/Ceramic Resonators .............................. 25
Customer Change Notification Service ............................ 481
Customer Notification Service ......................................... 481
Customer Support ............................................................ 481
D
Data Addressing Modes .................................................... 90
Data EEPROM
Analog Input Connection Considerations ................ 263
Associated Registers ............................................... 263
Configuration ........................................................... 260
Effects of a Reset .................................................... 262
Interrupts ................................................................. 262
Operation ................................................................. 261
Operation During Sleep ........................................... 262
Outputs .................................................................... 261
Reference ................................................................ 261
Response Time ........................................................ 261
Accuracy and Error .................................................. 266
Associated Registers ............................................... 267
Configuring .............................................................. 265
Connection Considerations ...................................... 266
Effects of a Reset .................................................... 266
Operation During Sleep ........................................... 266
Associated Registers ............................................... 170
CCP1 Pin Configuration ........................................... 169
CCPR1 Register ...................................................... 169
Software Interrupt .................................................... 169
Special Event Trigger .............................................. 169
Timer1/Timer3 Mode Selection ................................ 169
Special Event Trigger .............................. 163, 176, 258
Protection ................................................................ 364
Comparing Addressing Options with the Extended In-
Direct ......................................................................... 90
Indexed Literal Offset ................................................ 93
Indirect ....................................................................... 90
Inherent and Literal .................................................... 90
Code Protection ....................................................... 364
External Signal ................................................ 261
Internal Signal .................................................. 261
struction Set Enabled ........................................ 94
Affected Instructions .......................................... 93
BSR ................................................................... 95
Mapping the Access Bank ................................. 95
© 2009 Microchip Technology Inc.
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