PIC18F6680-E/PT Microchip Technology, PIC18F6680-E/PT Datasheet - Page 162
PIC18F6680-E/PT
Manufacturer Part Number
PIC18F6680-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PCM18XK1.pdf
(496 pages)
3.PIC18F6585-IPT.pdf
(8 pages)
4.PIC18F6585-IPT.pdf
(38 pages)
5.PIC18F6585-IPT.pdf
(14 pages)
Specifications of PIC18F6680-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6680-E/PT
Manufacturer:
MPS
Quantity:
53
Company:
Part Number:
PIC18F6680-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PCM18XK1 PDF datasheet #2
- PIC18F6585-IPT PDF datasheet #3
- PIC18F6585-IPT PDF datasheet #4
- PIC18F6585-IPT PDF datasheet #5
- Current page: 162 of 496
- Download datasheet (9Mb)
PIC18F6585/8585/6680/8680
12.1
Timer1 can operate in one of these modes:
• As a timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
FIGURE 12-1:
FIGURE 12-2:
DS30491C-page 160
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
T13CKI/T1OSO
T13CKI/T1OSO
Timer1 Operation
TMR1IF
Overflow
Interrupt
Flag bit
Data Bus<7:0>
Write TMR1L
Read TMR1L
T1OSI
TMR1IF
Overflow
Interrupt
Flag Bit
T1OSI
TIMER1 BLOCK DIAGRAM
TIMER1 BLOCK DIAGRAM: 16-BIT READ/WRITE MODE
8
T1OSC
T1OSC
High Byte
TMR1H
Timer 1
8
TMR1H
8
TMR1
Oscillator
Enable
TMR1
T1OSCEN
T1OSCEN
Enable
Oscillator
TMR1L
TMR1L
8
(1)
CLR
(1)
CLR
Clock
F
Internal
OSC
Clock
F
Internal
OSC
/4
TMR1ON
CCP Special Event Trigger
When TMR1CS = 0, Timer1 increments every instruc-
tion cycle. When TMR1CS = 1, Timer1 increments on
every rising edge of the external clock input or the
Timer1 oscillator if enabled.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI and RC0/T1OSO/T13CKI pins
become inputs. That is, the TRISC<1:0> value is
ignored and the pins are read as ‘0’.
Timer1 also has an internal “Reset input”. This Reset
can be generated by the CCP module (Section 15.0
“Capture/Compare/PWM (CCP) Modules”).
/4
On/Off
TMR1ON
CCP Special Event Trigger
TMR1CS
On/Off
TMR1CS
1
0
1
0
T1CKPS1:T1CKPS0
T1CKPS1:T1CKPS0
T1SYNC
Prescaler
1, 2, 4, 8
T1SYNC
Prescaler
1, 2, 4, 8
0
1
0
1
2
2
2004 Microchip Technology Inc.
Synchronized
Clock Input
Synchronized
Synchronize
Sleep Input
Clock Input
Synchronize
Sleep Input
det
det
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