A1645LK-I2 Allegro Microsystems Inc, A1645LK-I2 Datasheet - Page 9

• Manufacturer Part Number: A1645LK-I2
• Description: IC SENSOR HALL EFFECT AC 4-SIP
• Manufacturer: Allegro Microsystems Inc
• Type: Special Purposer

Specifications of A1645LK-I2

• Sensing Range: 120mV Trip, 120mV Release
• Voltage - Supply: 4 V ~ 24 V
• Current - Supply: 8.4mA
• Output Type: Digital, Open Collector
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 4-SIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output (max): -
• Features: -

Response, without AGC
A1642
Automatic Gain Control (AGC)
This feature allows the device to operate with an optimal internal
electrical signal, regardless of the air gap (within the AG speci-
fi cation). During calibration, the device determines the peak-to-
peak amplitude of the signal generated by the target. The gain of
the device is then automatically adjusted. Figure 5 illustrates the
effect of this feature.
Automatic Offset Adjust (AOA)
The AOA is patented circuitry that automatically compensates
for the effects of chip, magnet, and installation offsets. (For
capability, see Dynamic Offset Cancellation, in the Operat-
ing Characteristics table.) This circuitry is continuously active,
including both during calibration mode and running mode,
compensating for offset drift. Continuous operation also allows
Figure 5. Automatic Gain Control (AGC). The AGC function corrects for
variances in the air gap. Differences in the air gap affect the magnetic
gradient, but AGC prevents that from affecting device performance, as
shown in the lowest panel.
Response, with AGC
Internal Differential
Internal Differential
Target
Ring Magnet
Analog Signal
Analog Signal
V+
V+
N
Peak-Detecting Sensor IC with Continuous Calibration
S
N
Two-Wire True Zero-Speed Miniature Differential
S
AG
AG
AG
AG
Large
Small
Small
Large
it to compensate for offsets induced by temperature variations
over time.
Digital Peak Detection
A digital DAC tracks the internal analog voltage signal V
and is used for holding the peak value of the internal analog
signal. In the example shown in fi gure 6, the DAC would fi rst
track up with the signal and hold the upper peak’s value. When
V
esis, the output would switch and the DAC would begin tracking
the signal downward toward the negative V
DAC acquires the negative peak, the output will again switch
states when V
this point, the DAC tracks up again and the cycle repeats. The
digital tracking of the differential analog signal allows the device
to achieve true zero-speed operation.
Figure 6: Peak Detecting Switchpoint Detail
PROC
Internal
Differential
Analog Signal
Device
Output Current
drops below this peak value by B
PROC
V+
I+
is greater than the peak by the value B
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
B
OP
OP
, the device hyster-
PROC
peak. Once the
B
RP
PROC
RP
. At
,
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